JPS6460174A - Multiple-speed converting circuit - Google Patents
Multiple-speed converting circuitInfo
- Publication number
- JPS6460174A JPS6460174A JP62216872A JP21687287A JPS6460174A JP S6460174 A JPS6460174 A JP S6460174A JP 62216872 A JP62216872 A JP 62216872A JP 21687287 A JP21687287 A JP 21687287A JP S6460174 A JPS6460174 A JP S6460174A
- Authority
- JP
- Japan
- Prior art keywords
- output
- converter
- outputted
- clock
- phi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Television Systems (AREA)
Abstract
PURPOSE:To prevent a frequency characteristic from being deteriorated even at the time of using the D/A converter of a current addition by providing a peaking circuit to peak and output the output of an A/D converter in dividing it into two phases. CONSTITUTION:An input signal is clamped after a band restriction by an LPF (low-pass filter) 1, and digitized by an A/D converter 3 to be moved by the clock of phiD. Thereafter, one output is synchronized with the clock of phi through a peaking circuit 4, and an input signal is outputted. To the other output, a difference signal synchronized with the clock of phi' is outputted. Next, respective outputs are multiple-speed-converted by line memories 5 and 6, converted to analog by D/A converter 7 and 8 respectively, and synthesized through a resistance 9. After the band restriction is applied to the outputs, they are outputted. Thus, an output signal in which a frequency is not deteriorated can be obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62216872A JPS6460174A (en) | 1987-08-31 | 1987-08-31 | Multiple-speed converting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62216872A JPS6460174A (en) | 1987-08-31 | 1987-08-31 | Multiple-speed converting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6460174A true JPS6460174A (en) | 1989-03-07 |
Family
ID=16695238
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62216872A Pending JPS6460174A (en) | 1987-08-31 | 1987-08-31 | Multiple-speed converting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6460174A (en) |
-
1987
- 1987-08-31 JP JP62216872A patent/JPS6460174A/en active Pending
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