JPS6457505U - - Google Patents

Info

Publication number
JPS6457505U
JPS6457505U JP15050387U JP15050387U JPS6457505U JP S6457505 U JPS6457505 U JP S6457505U JP 15050387 U JP15050387 U JP 15050387U JP 15050387 U JP15050387 U JP 15050387U JP S6457505 U JPS6457505 U JP S6457505U
Authority
JP
Japan
Prior art keywords
speed command
output
speed
pid controller
pulse encoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15050387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15050387U priority Critical patent/JPS6457505U/ja
Publication of JPS6457505U publication Critical patent/JPS6457505U/ja
Pending legal-status Critical Current

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  • Control Of Position Or Direction (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図はそれぞれこの考案の一実
施例および従来例の構成を示す接続図である。 1…速度指令器、2…PID制御器、7…カウ
ンタ、8…パルスエンコーダ、10…微分器。
FIG. 1 and FIG. 2 are connection diagrams showing the configuration of an embodiment of this invention and a conventional example, respectively. 1... Speed command device, 2... PID controller, 7... Counter, 8... Pulse encoder, 10... Differentiator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 速度指令器、PID制御器、上記PID制御器
の出力で駆動される電動機、この電動機の回転軸
に設けられるパルスエンコーダ、このパルスエン
コーダの出力の一方を積算するカウンタ、上記パ
ルスエンコーダの出力の他方を微分する微分器お
よび減算器を備え、上記速度指令器からの速度指
令を減算器において上記微分器の出力である速度
信号で減算してPID制御器に与えると共に、上
記カウンタの出力により速度指令器を制御するよ
うにしたことを特徴とする速度制御装置。
A speed command device, a PID controller, an electric motor driven by the output of the PID controller, a pulse encoder provided on the rotating shaft of the electric motor, a counter that integrates one of the outputs of the pulse encoder, and the other of the outputs of the pulse encoder. The subtracter subtracts the speed command from the speed command device by the speed signal which is the output of the differentiator and provides the result to the PID controller, and the speed command is determined by the output of the counter. A speed control device characterized in that it controls a speed control device.
JP15050387U 1987-10-02 1987-10-02 Pending JPS6457505U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15050387U JPS6457505U (en) 1987-10-02 1987-10-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15050387U JPS6457505U (en) 1987-10-02 1987-10-02

Publications (1)

Publication Number Publication Date
JPS6457505U true JPS6457505U (en) 1989-04-10

Family

ID=31423710

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15050387U Pending JPS6457505U (en) 1987-10-02 1987-10-02

Country Status (1)

Country Link
JP (1) JPS6457505U (en)

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