JPS6455997A - Signal conversion system - Google Patents

Signal conversion system

Info

Publication number
JPS6455997A
JPS6455997A JP62213560A JP21356087A JPS6455997A JP S6455997 A JPS6455997 A JP S6455997A JP 62213560 A JP62213560 A JP 62213560A JP 21356087 A JP21356087 A JP 21356087A JP S6455997 A JPS6455997 A JP S6455997A
Authority
JP
Japan
Prior art keywords
signal
memory
memory area
storing
converter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62213560A
Other languages
Japanese (ja)
Other versions
JP2603960B2 (en
Inventor
Hiroyuki Watabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olympus Corp
Original Assignee
Olympus Optical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympus Optical Co Ltd filed Critical Olympus Optical Co Ltd
Priority to JP62213560A priority Critical patent/JP2603960B2/en
Publication of JPS6455997A publication Critical patent/JPS6455997A/en
Application granted granted Critical
Publication of JP2603960B2 publication Critical patent/JP2603960B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To save signal storing memory area and to make an effective use of other memory areas without uselessness, by extracting only such signal parts as corresponding to a valid image on the input side and the output side of an A/D converter means, and storing the signal parts sequentially in a memory. CONSTITUTION:Only the domain corresponding to a valid image of a luminance signal Y is sampled in a first A/D converter 53 by using a first rate (10.7MHz) clock signal f1 from a clock generator 52, and written in the first memory area 55a of a main memory 55. Also, only the domain corresponding to the valid image of a chrominance signal is sampled in a second A/D converter 54 by using a second rate (3.58MHz) clock signal f2 from the clock signal generator 52, and written in the second memory area 55b of the main memory 55. Therefore, the memory area necessary for storing the above signals can be made small in capacity, hence other memory areas can be effectively used without uselessness.
JP62213560A 1987-08-27 1987-08-27 Signal conversion system Expired - Lifetime JP2603960B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62213560A JP2603960B2 (en) 1987-08-27 1987-08-27 Signal conversion system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62213560A JP2603960B2 (en) 1987-08-27 1987-08-27 Signal conversion system

Publications (2)

Publication Number Publication Date
JPS6455997A true JPS6455997A (en) 1989-03-02
JP2603960B2 JP2603960B2 (en) 1997-04-23

Family

ID=16641231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62213560A Expired - Lifetime JP2603960B2 (en) 1987-08-27 1987-08-27 Signal conversion system

Country Status (1)

Country Link
JP (1) JP2603960B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS619093A (en) * 1984-06-25 1986-01-16 Sony Corp Time plex video signal recording system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS619093A (en) * 1984-06-25 1986-01-16 Sony Corp Time plex video signal recording system

Also Published As

Publication number Publication date
JP2603960B2 (en) 1997-04-23

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