JPS6453244A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS6453244A
JPS6453244A JP62209821A JP20982187A JPS6453244A JP S6453244 A JPS6453244 A JP S6453244A JP 62209821 A JP62209821 A JP 62209821A JP 20982187 A JP20982187 A JP 20982187A JP S6453244 A JPS6453244 A JP S6453244A
Authority
JP
Japan
Prior art keywords
memory
constitution
security code
data
coincidence
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62209821A
Other languages
Japanese (ja)
Inventor
Kikuzo Sawada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP62209821A priority Critical patent/JPS6453244A/en
Publication of JPS6453244A publication Critical patent/JPS6453244A/en
Pending legal-status Critical Current

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  • Storage Device Security (AREA)

Abstract

PURPOSE:To realize the protection of data to prevent outsiders from reading and writing data foul with use of a single IC memory as well as the constitution of the pin of a conventional IC and the arrangement of those pins, by using an input means, a memory means, a collation means and a control means. CONSTITUTION:A security mode control circuit 33 collates the security code supplied via the input means 30-32 with a security code stored in a security code memory circuit 35 via a collation means. When no coincidence is obtained between both codes, the reading/writing actions are inhibited partly or totally to a memory cell array 15. This inhibition state is released in case the coincidence is obtained between both codes. Thus the data can be surely protected by means of a single IC memory and with use of the constitution of a conventional pin and the arrangement of these pins.
JP62209821A 1987-08-24 1987-08-24 Semiconductor memory device Pending JPS6453244A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62209821A JPS6453244A (en) 1987-08-24 1987-08-24 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62209821A JPS6453244A (en) 1987-08-24 1987-08-24 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS6453244A true JPS6453244A (en) 1989-03-01

Family

ID=16579171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62209821A Pending JPS6453244A (en) 1987-08-24 1987-08-24 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6453244A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03276346A (en) * 1990-03-27 1991-12-06 Nec Corp Memory card

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03276346A (en) * 1990-03-27 1991-12-06 Nec Corp Memory card

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