JPS6451728A - Signal relay system - Google Patents

Abstract

PURPOSE:To prevent delay fluctuation at demodulation by adopting the digital sampling system for the demodulation of input and output carrier signals. CONSTITUTION:An input signal is converted into an intermediate frequency signal by an output of a digital control local oscillator 2 and a frequency converter 1. The output is inputted to a band limit filter 3. The signal is sampled by a sample-and-hold circuit 4. The sample-and-hold circuit 5 samples similarly the output of a modulator 10. The sampled output is inputted to an A/D converter 6 and inputted to a digital arithmetic processing circuit 7 and the signals are demodulated by the arithmetic processing. The timing of the sample-and-hold circuit 4 and the frequency of the intermediate frequency signal are controlled the same. On the other hand, the transmission signal is coherent to the sampling and timing and the phase shift is estimated by the digital arithmetic processing circuit to demodulate the output through the correction.