JPS6451386U

JPS6451386U -

Info

Publication number: JPS6451386U
Application number: JP14531287U
Authority: JP
Priority date: 1987-09-25
Filing date: 1987-09-25
Publication date: 1989-03-30

Description

[Brief explanation of the drawing]

第１図はこの考案に係る映像増幅回路の一実施
例を示す回路図、第２図は第１図に示す実施例の
動作を説明するための各パルスのタイムチヤート
、第３図は従来の映像増幅回路の一例を示す回路
図、第４図は第３図の動作を示すタイムチヤート
である。１１，１２，１３……映像信号入力端子、１４
……ブライトパルス入力端子、１５，１６，１７
……ドライブ回路、１８……クランプパルス入力
端子、１９，２０，２１……クランプ回路、２２
，２３，２４……出力トランジスタ、３５，３６
，３７……サンプルホールド回路、３９，４０，
４１……トランジスタ、４２，４３，４４……抵
抗。 Fig. 1 is a circuit diagram showing an embodiment of the video amplification circuit according to this invention, Fig. 2 is a time chart of each pulse to explain the operation of the embodiment shown in Fig. 1, and Fig. 3 is a circuit diagram of a conventional video amplification circuit. FIG. 4 is a circuit diagram showing an example of a video amplifying circuit, and FIG. 4 is a time chart showing the operation of FIG. 3. 11, 12, 13...Video signal input terminal, 14
...Bright pulse input terminal, 15, 16, 17
... Drive circuit, 18 ... Clamp pulse input terminal, 19, 20, 21 ... Clamp circuit, 22
, 23, 24...output transistor, 35, 36
, 37...sample hold circuit, 39, 40,
41...Transistor, 42, 43, 44...Resistor.

Claims

[Claims for Utility Model Registration] A drive circuit that superimposes a bright pulse on the pedestal period of an input video signal and outputs a signal with adjusted white balance, and a signal from this drive circuit that is different from the bright pulse. A DC regeneration circuit that performs pedestal clamping in the section, an output transistor for the three primary colors to which each R, G, and B output from this DC regeneration circuit is input to the base, and a superimposed signal in each R, G, and B signal. A video amplifying circuit comprising: a bright adjustment control circuit that detects the bright pulse and varies the operating current of each of the three primary color transistors according to its level.