JPS6436331A - Arithmetic processing circuit - Google Patents
Arithmetic processing circuitInfo
- Publication number
- JPS6436331A JPS6436331A JP19325887A JP19325887A JPS6436331A JP S6436331 A JPS6436331 A JP S6436331A JP 19325887 A JP19325887 A JP 19325887A JP 19325887 A JP19325887 A JP 19325887A JP S6436331 A JPS6436331 A JP S6436331A
- Authority
- JP
- Japan
- Prior art keywords
- value
- data
- part data
- character
- bit shift
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To obtain output data with a power value with high accuracy and at high speed, by converting input data to data of floating point format, and converting mantissa part data to the output data with the power value by performing bit shift so that the value of character part data can be set at the added value of the common multiple of the value of the denominator of a character and a prescribed value. CONSTITUTION:By converting the input data DZ to the mantissa part data DM and the character part data DE of floating point formats and obtaining the mantissa part data DT with the power value by using a ROM table circuit 8, it is possible to simplify the constitution of the ROM table circuit 8 by that share. At this time, the bit shift of the mantissa part data DE is performed by a bit shift circuit 7 so that the value of the character part data DM can be set at the added value 2n of the common multiple 2n and a prescribed integer value for the value 2 of the denominator of the character with the power value. And it is possible to obtain the output data DK with the power value by a reverse conversion circuit 9 by performing the bit shift by a prescribed quantity of the mantissa part data DT obtained via the ROM table circuit 8. In such a way, it is possible to execute the arithmetic processing of a power with simple constitution and high accuracy, and at high speed as a whole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19325887A JPS6436331A (en) | 1987-07-31 | 1987-07-31 | Arithmetic processing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19325887A JPS6436331A (en) | 1987-07-31 | 1987-07-31 | Arithmetic processing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6436331A true JPS6436331A (en) | 1989-02-07 |
Family
ID=16304955
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19325887A Pending JPS6436331A (en) | 1987-07-31 | 1987-07-31 | Arithmetic processing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6436331A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4917802A (en) * | 1986-02-10 | 1990-04-17 | Onoda Autoclaved Light Weight Concrete Co., Ltd | Method for treating waste water |
-
1987
- 1987-07-31 JP JP19325887A patent/JPS6436331A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4917802A (en) * | 1986-02-10 | 1990-04-17 | Onoda Autoclaved Light Weight Concrete Co., Ltd | Method for treating waste water |
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