JPS643390B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device that reads out optical information accumulated in a plurality of photodiodes arranged two-dimensionally on the surface of a semiconductor substrate. In particular, the present invention relates to a pulse and synchronization signal generation circuit for driving a scanning circuit of a solid-state imaging device.

FIG. 1 shows an outline of the configuration of a solid-state image sensor.

FIG. 1A shows an example of the basic configuration of a two-dimensional solid-state image sensor, and FIG. 1B shows an example of a timing chart of horizontal scanning pulses and vertical scanning pulses.
In FIG. 1A, reference numerals 1 and 2 are horizontal and vertical scanning circuits, respectively, and by applying 2 to 4 phase clock pulses CPxx and CPy, input pulses Vsx and Vsy are controlled over a fixed timing period of the clock. The output pulse train shown in Figure 1B is shifted by Vox(1), Vox(2)..., Voy(1), Voy(2)...
The output lines Ox(1), Ox(2) of each stage of the scanning circuit...
Output to Oy(1), Oy(2)... The switching elements 5 and 6 are sequentially opened and closed by this pulse train, and signals from the individual photoelectric conversion elements 3 arranged two-dimensionally are outputted onto the video output line 4. Since the signal from the photoelectric conversion element 3 corresponds to the optical image projected thereon, a video signal can be extracted by the above operation.

This type of solid-state image sensor requires about 500 x 500 photoelectric conversion elements, switching elements, and scanning unit circuits to obtain high resolution.

Therefore, it is usually manufactured using MOS-LSI technology, which is relatively easy to achieve high integration and allows the photoelectric conversion element 3 and the switching elements 5 and 6 to be integrated. Figure 2 shows the structure of a photoelectric conversion element that occupies most of the area of a solid-state imaging IC. 13 is a semiconductor substrate of one conductivity type; 5 and 6 are switches consisting of insulated gate field effect transistors (hereinafter referred to as MOS transistors) for selecting horizontal and vertical positions, respectively;
It is made up of diffusion layers 7, 10, 15 of conductivity type opposite to 3 and gate electrodes 9, 14 provided with an insulating oxide film 8 interposed therebetween. Reference numeral 10 also designates a photodiode that utilizes the source of the MOS transistor 6, which serves as a vertical switch. Output pulse Vox is sent to scanning circuits 1 and 2 using shift registers etc. consisting of MOS transistors.
(N) and Voy (N) were discharged in proportion to the amount of incident light in the diode 10 at the position where they were simultaneously applied to the gates of MOS switching elements 5 and 6 through the output lines Ox (N) and Oy (N). amount of charge is charged from the video voltage 11. The charging current at that time passes through the load resistor 12 and is output as a video signal to the output terminal OUT.
read out.

FIG. 3A shows a specific example of the scanning circuits 1 and 2, which are conventionally well-known shift registers consisting of inverters and transfer gates. Two-phase clock pulses CP1 and CP2 shown in the pulse chart in Figure 3B
and input pulse Vs to input terminals 18 to 20 respectively.
When input to , output pulses Vo(1), Vo(2), etc. are obtained.

Figure 3A shows an example of a shift register using two-phase clock pulses;
Shift registers using phase clock pulses are also known.

As is clear from the above description, in the solid-state imaging device, driving pulses (clock pulses and input pulses) for operating the scanning circuits 1 and 2 are used.
A means of generation is required.

As can be seen from FIG. 1, a high frequency signal of, for example, about 6 to 7 MHz is used as the clock pulse CPx of the horizontal scanning circuit 1, depending on the number of photoelectric conversion elements in the vertical direction. For the input pulse Vsx of the horizontal scanning circuit 1 and the clock pulse CPy of the vertical scanning circuit 2, a signal of the horizontal frequency of the television signal is used, and for the input pulse Vsy of the vertical scanning circuit 2, the vertical frequency of the television signal is used.

FIG. 4 shows the configuration of a conventional solid-state imaging device. 2
A reference frequency oscillator 1 generates a high frequency signal of 14.31818 MHz in an NTSC standard imaging device, for example. This reference frequency signal 22 is input to a synchronization signal generation circuit 23 to generate various synchronization signals (horizontal and vertical synchronization signals,
(clamp pulse, horizontal/vertical blanking pulse, etc.) 24, an input pulse Vsx for the horizontal scanning circuit 1, a clock pulse CPy for the vertical scanning circuit 2, and an input pulse Vsy for the vertical scanning circuit 2.

On the other hand, the reference frequency signal 22 is input to the frequency divider circuit 26 of the horizontal scanning circuit clock pulse generation circuit 25 to create a 7.16 MHz signal, which is divided by two, for example, and then passed through the phase and pulse width setting circuit 27 to the horizontal scanning circuit. A clock pulse CPx for driving circuit 1 is generated.

The above Vsx, CPy, Vsy, CPx are the solid-state image sensor 2
The signal is input to horizontal scanning circuit 1 and vertical scanning circuit 2 of 8.

The video signal 29 read out from the output terminal OUT of the solid-state image sensor 28 and the aforementioned synchronization signal 24 are input to a signal processing circuit 30 to obtain a composite television signal 31.

32 is a power supply circuit, and reference frequency oscillator 2
1. Supply operating power to the synchronization signal generation circuit 23 and the horizontal scanning circuit clock pulse generation circuit 25.

Problems in the above conventional example will be explained. As is clear from the above description, the synchronizing signal generating circuit 23 is a circuit that generates a horizontal or vertical frequency signal of a television signal from the reference frequency signal 22. In the NTSC standard, the horizontal frequency _H is
Since the frequency is 14.31818/910MHz and the vertical frequency _fV is _2fH /525, the synchronization signal generation circuit 23 generally has a built-in frequency dividing circuit.

By the way, when the frequency dividing circuit operates, AC ripples of the divided frequency are superimposed on the power supply line 33. In the conventional example shown in FIG. 4, the voltage on which this AC ripple is superimposed is supplied to the reference frequency oscillator 21 and the clock pulse generation circuit 25 for the horizontal scanning circuit.
At this time, the reference frequency signal 22 or the frequency dividing circuit 2
The above AC ripple is also superimposed on the output voltage level of the output signal No. 6. In the known digital circuit technology, the frequency divider circuit 26 and the amplitude/pulse width setting circuit 27 are composed of various gates (NAND gate, NOR gate, inverter, etc.), and when the input signal voltage level of these gates changes, the output signal changes. pulse 1
The duty ratio of level and 0 level fluctuates.

In FIG. 3B, a variation in the duty ratio of CP2 results in a variation in the pulse width of Vo(n), which results in a variation in the time during which the MOS switching element 5 shown in FIG. 2 closes. As a result, the amount of charging current charged by the video voltage 11 via the MOS switching elements 5 and 6 explained in FIG. 2 fluctuates.
The video signal therefore fluctuates.

Since the frequency division frequency of the synchronization signal generation circuit 23 includes the frequency of the video signal frequency band of the television signal, if it is mixed into the video signal as explained above, it cannot be removed by a filter or the like, and a pseudo signal ( frequency division noise) and interferes with the video signal.

An object of the present invention is to prevent the AC ripple current flowing through the frequency divider circuit of the synchronization signal generation circuit from being supplied to the reference oscillator or the clock pulse generation circuit for the horizontal scanning circuit, thereby easily introducing frequency division noise into the video signal. The purpose of the present invention is to provide a solid-state imaging device that never fails.

The key point of the present invention is to insert an AC decoupling circuit between the operating power supply line of the synchronizing signal generating circuit and the operating power supply line of the clock pulse generating circuit for the reference frequency oscillator and horizontal scanning circuit. The configuration is such that the alternating current ripple that occurs does not overlap with the power supply line for other operations.

The invention will be explained in more detail by way of specific examples.

FIG. 5 shows a block diagram of an embodiment of the present invention. Components in the figure that have the same functions as those in FIG. 4 are given the same numbers. Further, the configurations subsequent to the output signals of the synchronizing signal generating circuit 23 and the clock pulse generating circuit 25 for the horizontal scanning circuit are the same as those shown in FIG. 4, and will therefore be omitted.

In FIG. 5, 34 is an AC decoupling circuit. Generated in the synchronization signal generation circuit 23,
The alternating current ripple of the divided frequency superimposed on the power supply line 35 is absorbed by the current flowing through a closed loop constructed by inserting a decoupling circuit 34 as shown at 36, and generates clock pulses for the reference frequency oscillator 21 and the horizontal scanning circuit. The above AC ripple is not superimposed on the power supply line 37 of the circuit 25.

FIG. 6 shows an embodiment of the decoupling circuit 34. The decoupling circuit 34 is composed of a coil 38 and a capacitor 39, and due to the difference in AC impedance, most of the AC ripples generated in the synchronization signal generation circuit 23 are absorbed by the closed loop 40.
Almost no AC ripples are superimposed on the power line 35 on the power supply circuit 32 side.

According to the present invention, the power supply ripple of the divided frequency generated in the synchronization signal generation circuit is hardly superimposed on the operating power supply line of the reference frequency oscillator and the horizontal scanning circuit clock pulse generation circuit, so that the power supply ripple of the divided frequency generated in the synchronization signal generation circuit is hardly superimposed on the operating power supply line of the clock pulse generation circuit for the horizontal scanning circuit. Ambient noise interference is reduced.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram illustrating the outline of a solid-state image sensor, FIG. 2 is a sectional view showing the structure of a photoelectric conversion element of the solid-state image sensor, and FIG. 3 is a circuit diagram illustrating a scanning circuit of the solid-state image sensor. FIG. 4 is a block diagram showing the configuration of a conventional solid-state imaging device, FIG. 5 is a block diagram showing the configuration of an embodiment of the solid-state imaging device according to the present invention, and FIG. 6 is an embodiment of an AC decoupling circuit according to the present invention. FIG. 21...Reference frequency oscillator, 23...Synchronizing signal generation circuit, 25...Clock pulse generation circuit for horizontal scanning circuit, 32...Power supply circuit, 34...AC decoupling circuit.

Claims (1)

[Claims] 1 A sensor section having a plurality of photoelectric conversion elements arranged two-dimensionally, a horizontal scanning circuit that generates horizontal scanning pulses, and a vertical scanning circuit that generates vertical scanning pulses, a solid-state image pickup device that reads out optical information using horizontal scanning pulses and vertical scanning pulses, oscillation means that generates a reference signal of a higher frequency than the horizontal scanning frequency of the television signal, and frequency division of the output signal of the oscillation means. a first pulse generating means for generating a clock pulse for driving the horizontal scanning circuit; and a first pulse generating means for frequency-dividing the output signal of the oscillating means to generate pulse signals at the horizontal scanning frequency and vertical scanning frequency of the television signal. A solid-state imaging device comprising a second pulse generating means, and a power supply circuit that supplies current to the oscillating means and the first and second pulse generating means, wherein the power supply circuit supplies the current to the oscillating means and the first pulse generating means. A first power supply line through which current is supplied to the pulse generation means, a second power supply line through which current is supplied from the power supply circuit to the second pulse generation means, and connected to the second power supply line. and includes decoupling means for removing AC ripple voltage generated in the second power supply line, and frequency division noise generated by the current flowing through the second pulse generation means is mixed into the video signal generated by the solid-state imaging device. A solid-state imaging device characterized in that the solid-state imaging device is prevented from