JPS6433797A - Semiconductor integrated circuit - Google Patents
Semiconductor integrated circuitInfo
- Publication number
- JPS6433797A JPS6433797A JP18943587A JP18943587A JPS6433797A JP S6433797 A JPS6433797 A JP S6433797A JP 18943587 A JP18943587 A JP 18943587A JP 18943587 A JP18943587 A JP 18943587A JP S6433797 A JPS6433797 A JP S6433797A
- Authority
- JP
- Japan
- Prior art keywords
- node
- voltage
- time
- goes
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Read Only Memory (AREA)
Abstract
PURPOSE:To prevent the generation of a latch-up and the enlargement of a chip by setting a boosting circuit in a device and controlling the output of a high voltage from an outside with the boosted voltage. CONSTITUTION:When a column selecting signal IN is '1' at the time of programming, a MOSTR 11 in an inverter 13 is nonconducted, a TR 12 is conducted, and an output node 15 goes to 0V. Consequently, a column selected line COLi is set to 0V through a TR 16. In such a time, current flows from a node 25 of the high voltage VP through TRs 26, 27, 22, 23 and the TR 16, and when the voltage of a node 20 is the absolute value of a threshold or more, a TR 21 is nonconducted. On the other hand, when data are read out from a memory cell, the high voltage VP of boosting circuits VH1 and VH2 and the node 25 is set to 0V, and a control signal R/W is set to '1'. In such a time, when the signal IN is '0', the TR 11 is conducted, the output of the node 15 goes to VC, and the line COLi also goes to VP through the TR 16. In such a time, the TR 22 is in a nonconductive condition, and the voltage of the line COLi is not discharged to the voltage VS.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18943587A JPH0782756B2 (en) | 1987-07-29 | 1987-07-29 | Semiconductor integrated circuit |
US07/226,312 US4916334A (en) | 1987-07-29 | 1988-07-29 | High voltage booster circuit for use in EEPROMs |
KR1019880009577A KR910007403B1 (en) | 1987-07-29 | 1988-07-29 | Semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18943587A JPH0782756B2 (en) | 1987-07-29 | 1987-07-29 | Semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6433797A true JPS6433797A (en) | 1989-02-03 |
JPH0782756B2 JPH0782756B2 (en) | 1995-09-06 |
Family
ID=16241199
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18943587A Expired - Lifetime JPH0782756B2 (en) | 1987-07-29 | 1987-07-29 | Semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0782756B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100336224C (en) * | 1994-07-25 | 2007-09-05 | 精工电子工业株式会社 | Semiconductor integrated circuit device and electronic device using them |
-
1987
- 1987-07-29 JP JP18943587A patent/JPH0782756B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100336224C (en) * | 1994-07-25 | 2007-09-05 | 精工电子工业株式会社 | Semiconductor integrated circuit device and electronic device using them |
Also Published As
Publication number | Publication date |
---|---|
JPH0782756B2 (en) | 1995-09-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |