JPS643374B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a polarity switching circuit, and more particularly to an analog-to-digital converter (hereinafter abbreviated as unipolar DAC) using a successive approximation technique using a unipolar digital to analog converter (hereinafter abbreviated as unipolar DAC). The present invention provides a polarity switching circuit suitable for realizing an ADC (hereinafter abbreviated as ADC) with a simple configuration and excellent accuracy.

In recent years, with the rapid progress of digital technology, even in fields where information has traditionally been processed as analog quantities, there is a growing tendency to use ADCs to convert analog quantities into digital quantities and then process the information. For example, conventional voltage measurements have used analog voltmeters that use the principle of electromagnetic induction.
The use of digital voltmeters instead is widespread. This is an example of converting a certain voltage (analog quantity) into a digital signal using an ADC housed in a digital voltmeter, driving the display with this digital signal, and displaying it in decimal numbers to make measurement easier. .

Generally, integral type, successive approximation type, parallel type, cascade type, etc. are used as ADC conversion methods. Choosing which conversion method to use for the ADC is
They are broadly classified according to the speed and accuracy required for ADCs.

Generally, the integral type is often used for high-accuracy/low-speed types, the parallel type, cascade type, etc. are used for high-speed types, and the successive approximation type is used for relatively medium-accuracy/medium-speed types.

Conventionally, a successive approximation type ADC generally has a configuration as shown in FIG. Figure 1 shows analog input terminal 1 and the sample and hold circuit (hereinafter referred to as SH) for sampling and holding the analog input signal.
circuit) 2, a polarity switching circuit 3 for inverting the sampled and held analog input signal according to its electrical polarity, a voltage comparator 4, and a unipolar circuit.
This is an example of an ADC composed of a digital control circuit 5 for controlling a DAC 6.

The successive approximation type ADC judges the output of the unipolar DAC and the sampled and held analog signal by a voltage comparator 4, and based on the judgment result, the digital control circuit 5
By controlling the unipolar DAC 6, an analog quantity is converted into a digital signal.

Figure 2 shows a conventional polarity switching circuit and
Showing the SH circuit. FIG. 2 shows the SH circuit 2 and polarity switching circuit 3 in FIG.
This is an example realized using 31, 32, 33 and 34. terminals 21, 22, 26 and 27, sample and hold capacitance 25 and switches 23 and 2
When the switches 23 and 24 are ON, the SH circuit 2 is in a "sampling state" and applies an input analog signal to the sample/hold capacitor 25. Next, switches 23 and 24 are turned OFF.
When this happens, it becomes a “hold state” and the switch 23
and 24 hold the input analog signal immediately before turning OFF.

Terminals 26, 27, 35 and 36 and switch 3
This is a polarity switching circuit 3 composed of 1, 32, 33 and 34. Depending on the polarity of the input analog signal held, switches 31 and 33 are turned on and switches 32 and 34 are turned off.
By reversing all the switches in the above state,
Performs an operation to switch the polarity of the input analog signal held.

A line segment 37, a terminal 38, and a capacitor 39 in FIG. 2 show an equivalent circuit of a load (for example, the voltage comparator 4 in FIG. 1) connected to the polarity switching circuit 3.

An example of the operation shown in FIG. 2 will be explained below. An input analog signal V _IN is applied to the terminal 21, and the terminal 22 is grounded. The terminal 35 is connected to the voltage comparator 4, and the terminal 36 is connected to the output terminal of the positive output DAC 6.

The input analog signal V _IN is the switch 31, 3
When the switches 2, 33 and 34 are OFF and the switches 23 and 24 are ON, the input analog signal V _IN is applied to the sample-and-hold capacitor 25. When the switches 23 and 24 are OFF, the input analog signal V IN is held in the sample-and-hold capacitor 25. Next, the output voltage of the positive output DAC 6 is grounded and the switches 31 and 33 are turned on. The input analog signal held is applied to the input terminal of the voltage comparator 4, and the comparison result is input to the digital control circuit 5. Here, the operation of the polarity switching circuit 3 differs depending on whether the analog input signal V _IN has positive polarity or negative polarity.

When V _IN > 0, switches 31, 33 OFF Switches 32, 34 ON When V _IN < 0, switches 31, 33 ON Switches 32, 34 OFF In other words, if the analog input signal is negative, after determining the polarity, switches 21, 32, 33 and 34
If the state of the switch does not change and the analog input signal has positive polarity, the polarity of the analog input signal can be inverted by reversing the states of all the switches. This polarity reversal is the output voltage of the positive output DAC.
Since V _DAC is positive, the judgment level of voltage comparator 4 is the ground point, so the analog input signal V _IN
This is because when the polarity is positive, the polarity must be reversed by the polarity switching circuit and the input voltage V _C of the voltage comparator 4 must be in the form of equation (1).

V _C = -V _IN +V _DAC ...(1) In other words, the positive output where V _C = 0 in equation (1)
The digital control circuit 5 controls the positive output DAC using successive approximation techniques so that the output voltage of the DAC becomes equal to V _IN , and the control signal that makes V _C =0 becomes the digital amount of the input analog signal V _IN .

Conventionally used polarity switching circuits have the following drawbacks. In FIG. 2, the capacitance value of the sample/hold capacitor 25 is designated as _CH , and the capacitance value of the capacitor 39 is designated as C _S. The charge Q _H accumulated in the sample/hold capacitor 25 is given by equation (2) Q _H =C _H・V _IN ...(2) Next, the charge when the switches 31 and 33 are turned on is Since the conservation law holds, the formula (2-
1), (2-2) and (2-3).

Q _H = Q' _H + Q _S ...... (2-1) Q' _H = C _H V' _IN ...... (2-2) Q _S = C _S V' _IN ...... (2-3) Here, the charge Q′ _H is the charge accumulated in the capacitor C _H ,
The charge Q _S indicates the charge accumulated in the capacitor C _S . If the polarity of the input analog signal V _IN is negative,
Since the switches 31 and 33 remain ON, when the output voltage V _DAC of the positive output DAC 6 becomes equal to V _IN , the charge Q _S of the capacitor 39 becomes zero, and according to the law of conservation of charge, the charge Q _S of the capacitor 39 becomes all Since it returns to capacitor C _H , the voltage across capacitor C _H becomes equal to the input analog voltage V _IN .

On the other hand, when the input analog voltage V _IN has positive polarity, switches 31 and 33 are turned off, and switches 32 and 34 are turned on.

The respective charges accumulated in each capacitance at this time are calculated by referring to formulas (2-1), (2-2) and (2-3), and formulas (3-1), (3-2) and ( 3-
It can be expressed as 3).

−Q′ _H ＋Q _S =−Q″ _H −Q′ _S ……(3-1) Q″ _H ＝V″ _IN C _H ……(3-2) Q′ _S ＝V″ _IN C _S ……( 3-3) Positive output as well as negative polarity of input analog voltage
Considering the case where the output voltage V _DAC of the DAC 6 operates and the equation (1) holds true, from the equation (3-1), -Q' _H +Q _S =-Q'' _H (4) The equation (4) holds. Expression (2), (2-1), (2-
By substituting and rearranging 2), (2-3), and (3-2), equation (5) is obtained.

V″ _IN = CH−CS/CH+CSV _IN ...(5) From equation (5), it can be seen that the error increases when the input analog voltage is positive.
This is not preferable because it causes deterioration in accuracy.

The present invention improves these drawbacks and significantly improves the deterioration of accuracy. By using the present invention, a polarity switching circuit with excellent accuracy can be realized with a simple configuration.

The present invention will be explained in detail below using Examples.

FIG. 3 is an explanatory diagram of an embodiment of the present invention. Third
In the figure, the same numbers are used for the same parts as in FIG. 2. The difference between FIG. 3 and FIG. 2 is that a switch 41 for discharging the capacitor 39 is added.

After the switches 31 and 33 are turned on and the polarity of the input analog signal is determined, the discharge switch 41 turns off the switches 31 and 34 regardless of whether the input analog signal is positive or negative, and turns on the discharge switch 41 to reduce the capacitance 39. charge accumulated in
The purpose is to discharge _QS . After the charge Q _S is sufficiently discharged, the switches 31, 32, 33, and 34 are controlled under the conditions described above depending on the polarity of the input analog signal.

When the switch operation described above is performed and the input voltage V _C of the voltage comparator 6 becomes zero, the sample
The voltage V′ _IN across the hold capacitor C _H is expressed by the formula (2-1),
It is easily determined from (2-2) and (2-3) and given by formulas (6-1) and (6-2).

V _IN > o V' _IN = CH/CH + CSV _IN ...... (6-1) V _IN < o V' _IN = CH/CH + CSV _IN ... (6-2) Equations (6-1) and (6-2) As can be seen, by using the present invention, it is possible to realize an excellent polarity switching circuit with small errors and whose errors do not vary depending on the polarity of the input analog voltage, and to construct an ADC with excellent characteristics.

Note that in this example, a positive output DAC was used as a unipolar DAC, but this is a positive output DAC.
Needless to say, the present invention is not limited to a DAC, and can be implemented by simply reversing the control of the switches 31, 32, 33, and 34 even if a negative output DAC is used.

[Brief explanation of the drawing]

FIG. 1 is a general configuration diagram of a successive approximation type ADC, FIG. 2 is an explanatory diagram of a conventional polarity switching circuit, and FIG. 3 is an explanatory diagram of an embodiment of the present invention. 1...Analog input terminal, 2...Sample/hold circuit, 3...Polarity switching circuit, 4...Voltage comparator, 5...Digital control circuit, 6...Unipolar
DAC, 21, 22, 26, 27, 35, 36,
38...Terminal, 23, 24, 31, 32, 33,
34, 41...Switch, 37...Line segment, 25...
...sample/hold capacity, 39...capacity.

Claims (1)

[Claims] 1. An input terminal that inputs an analog input signal, a sample hold circuit that is connected to the input terminal and holds the analog input signal, and a unipolar digital-to-analog converter that sequentially outputs an analog signal according to the digital signal. a comparison circuit that compares the comparison signal with a ground potential; and switching the voltage of the held signal held in the sample and hold circuit so that it has a polarity opposite to the polarity of the analog signal based on the output of the comparison circuit; a polarity switching circuit that adds the analog signal to the switched holding signal and supplies the result to the comparison circuit as the comparison signal; and a polarity switching circuit that sequentially outputs the switched holding signal and the analog signal based on the output of the comparison circuit. means for outputting the digital signal as a digital output signal when the polarity switching circuit becomes equal, the polarity switching circuit receives the voltage of the holding signal at first and second input terminals, and receives the voltage of the holding signal based on the output of the comparison circuit. The first and second input terminals are connected to an input section that receives the analog signal from the unipolar digital-to-analog converter and an output section that outputs the comparison signal to the comparison circuit. The polarity is selected and switched so that the polarity is opposite to the polarity of the signal, and the switch is connected between the output section and the circuit point held at the ground potential, and the switch is connected to the polarity of the signal. An analog-to-digital converter, characterized in that the polarity switching circuit performs the switching of the polarity of the holding signal after the switching circuit is brought into a closed state prior to selective switching, and the switch is then opened.