JPS6433219U - - Google Patents

Info

Publication number
JPS6433219U
JPS6433219U JP12716787U JP12716787U JPS6433219U JP S6433219 U JPS6433219 U JP S6433219U JP 12716787 U JP12716787 U JP 12716787U JP 12716787 U JP12716787 U JP 12716787U JP S6433219 U JPS6433219 U JP S6433219U
Authority
JP
Japan
Prior art keywords
inductor
limiter circuit
capacitor
diodes
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12716787U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12716787U priority Critical patent/JPS6433219U/ja
Publication of JPS6433219U publication Critical patent/JPS6433219U/ja
Pending legal-status Critical Current

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Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例を示すリミツタ回路の
回路図、第2図は第1図リミツタ回路の帯域特性
図、第3図は本考案の前提となるリミツタ回路の
回路図、第4図は第3図リミツタ回路の帯域特性
図である。 4……第1のダイオード、5……第2のダイオ
ード、12……ローパスフイルタ、13……第1
のインダクタ、14……第2のインダクタ、15
……(フイルタ用)コンデンサ。
Figure 1 is a circuit diagram of a limiter circuit showing an embodiment of the present invention, Figure 2 is a band characteristic diagram of the limiter circuit of Figure 1, Figure 3 is a circuit diagram of a limiter circuit that is the premise of the present invention, and Figure 4. is a band characteristic diagram of the limiter circuit in FIG. 3. 4...First diode, 5...Second diode, 12...Low pass filter, 13...First
inductor, 14... second inductor, 15
...(For filter) Capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 互に異なるバイアス方向に直列接続され、それ
ぞれにインダクタを含む第1、第2のダイオード
を信号伝送路に介挿したリミツタ回路において、
上記第1、第2のダイオード間の上記インダクタ
の接続点をコンデンサを介して接地し、上記各イ
ンダクタ及びコンデンサにてローパスフイルタを
構成したことを特徴とするリミツタ回路。
In a limiter circuit in which first and second diodes connected in series in different bias directions and each including an inductor are inserted in a signal transmission path,
A limiter circuit characterized in that a connection point of the inductor between the first and second diodes is grounded via a capacitor, and each of the inductors and the capacitor constitutes a low-pass filter.
JP12716787U 1987-08-20 1987-08-20 Pending JPS6433219U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12716787U JPS6433219U (en) 1987-08-20 1987-08-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12716787U JPS6433219U (en) 1987-08-20 1987-08-20

Publications (1)

Publication Number Publication Date
JPS6433219U true JPS6433219U (en) 1989-03-01

Family

ID=31379349

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12716787U Pending JPS6433219U (en) 1987-08-20 1987-08-20

Country Status (1)

Country Link
JP (1) JPS6433219U (en)

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