JPS61195174U - - Google Patents
Info
- Publication number
- JPS61195174U JPS61195174U JP5382085U JP5382085U JPS61195174U JP S61195174 U JPS61195174 U JP S61195174U JP 5382085 U JP5382085 U JP 5382085U JP 5382085 U JP5382085 U JP 5382085U JP S61195174 U JPS61195174 U JP S61195174U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- input terminal
- input
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 230000003321 amplification Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
Landscapes
- Processing Of Color Television Signals (AREA)
- Control Of Amplification And Gain Control (AREA)
Description
第1図は、本考案の一実施例を示す回路図、及
び第2図は従来の集積回路を示す回路図である。
主な図番の説明、6……IC、7……第1帯域
増幅回路、8……第2帯域増幅回路、9……入力
端子、10……コンデンサ、11……ローパスフ
イルタ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional integrated circuit. Explanation of main figure numbers: 6 ...IC, 7...1st band amplification circuit, 8...2nd band amplification circuit, 9...input terminal, 10...capacitor, 11 ...low pass filter.
Claims (1)
とする第1回路と、直流信号源から供給される直
流信号を入力信号とする第2回路とを内蔵する集
積回路において、該集積回路に単一の入力端子を
配置して前記交流入力信号及び前記直流入力信号
を共通に前記入力端子に供給し、前記入力端手と
前記第1回路との間にコンデンサを挿入するとと
もに、前記入力端子と前記第2回路との間にロー
パスフイルタを挿入したことを特徴とする集積回
路。 An integrated circuit that includes a first circuit whose input signal is an AC signal supplied from an AC signal source and a second circuit whose input signal is a DC signal supplied from a DC signal source. an input terminal is arranged to commonly supply the AC input signal and the DC input signal to the input terminal, a capacitor is inserted between the input terminal and the first circuit, and a capacitor is inserted between the input terminal and the first circuit. An integrated circuit characterized in that a low-pass filter is inserted between the second circuit and the second circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5382085U JPS61195174U (en) | 1985-04-11 | 1985-04-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5382085U JPS61195174U (en) | 1985-04-11 | 1985-04-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61195174U true JPS61195174U (en) | 1986-12-05 |
Family
ID=30575038
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5382085U Pending JPS61195174U (en) | 1985-04-11 | 1985-04-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61195174U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005117000A (en) * | 2003-09-19 | 2005-04-28 | Sharp Corp | Electrostatic protection circuit and high frequency circuit apparatus having same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5419784U (en) * | 1977-07-12 | 1979-02-08 |
-
1985
- 1985-04-11 JP JP5382085U patent/JPS61195174U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5419784U (en) * | 1977-07-12 | 1979-02-08 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005117000A (en) * | 2003-09-19 | 2005-04-28 | Sharp Corp | Electrostatic protection circuit and high frequency circuit apparatus having same |
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