JPS6431248A - Control system for peripheral lsi - Google Patents

Control system for peripheral lsi

Info

Publication number
JPS6431248A
JPS6431248A JP62186683A JP18668387A JPS6431248A JP S6431248 A JPS6431248 A JP S6431248A JP 62186683 A JP62186683 A JP 62186683A JP 18668387 A JP18668387 A JP 18668387A JP S6431248 A JPS6431248 A JP S6431248A
Authority
JP
Japan
Prior art keywords
chip microcomputer
peripheral lsi
input
output port
control system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62186683A
Other languages
Japanese (ja)
Inventor
Masataka Mizuno
Tatsuo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Ten Ltd
Original Assignee
Denso Ten Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Ten Ltd filed Critical Denso Ten Ltd
Priority to JP62186683A priority Critical patent/JPS6431248A/en
Publication of JPS6431248A publication Critical patent/JPS6431248A/en
Pending legal-status Critical Current

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  • Microcomputers (AREA)

Abstract

PURPOSE:To add a necessary function to a one-chip microcomputer and to enlarge the utilized range of the one-chip microcomputer to be advantageous in the aspects of a cost and an occupied capacity by controlling a peripheral LSI with the input and output port of the one-chip microcomputer. CONSTITUTION:A peripheral LSI 2 is connected to an input and output port 11 of a one-chip microcomputer 11 and the peripheral LSI 2 is controlled by the input and output port 11 of the one-chip microcomputer 1. Namely, at a normal time, since the peripheral LSI which is bus-combined to a microprocessor is connected through the input and output port to the one-chip microcomputer, the necessary function for the one-chip microcomputer can be lately added. Thus, the utilized range of the one-chip microcomputer which is advantageous in the aspects of the cost and the occupied capacity can be enlarged.
JP62186683A 1987-07-28 1987-07-28 Control system for peripheral lsi Pending JPS6431248A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62186683A JPS6431248A (en) 1987-07-28 1987-07-28 Control system for peripheral lsi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62186683A JPS6431248A (en) 1987-07-28 1987-07-28 Control system for peripheral lsi

Publications (1)

Publication Number Publication Date
JPS6431248A true JPS6431248A (en) 1989-02-01

Family

ID=16192812

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62186683A Pending JPS6431248A (en) 1987-07-28 1987-07-28 Control system for peripheral lsi

Country Status (1)

Country Link
JP (1) JPS6431248A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213322A (en) * 1982-06-07 1983-12-12 Hitachi Ltd Interruption controlling interface
JPS603776A (en) * 1983-06-22 1985-01-10 Matsushita Electric Ind Co Ltd One-chip microcomputer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213322A (en) * 1982-06-07 1983-12-12 Hitachi Ltd Interruption controlling interface
JPS603776A (en) * 1983-06-22 1985-01-10 Matsushita Electric Ind Co Ltd One-chip microcomputer

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