JPS6429826U - - Google Patents

Info

Publication number
JPS6429826U
JPS6429826U JP12315787U JP12315787U JPS6429826U JP S6429826 U JPS6429826 U JP S6429826U JP 12315787 U JP12315787 U JP 12315787U JP 12315787 U JP12315787 U JP 12315787U JP S6429826 U JPS6429826 U JP S6429826U
Authority
JP
Japan
Prior art keywords
wiring pattern
semiconductor chip
semiconductor device
void
impaired
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12315787U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12315787U priority Critical patent/JPS6429826U/ja
Publication of JPS6429826U publication Critical patent/JPS6429826U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Landscapes

  • Structure Of Printed Boards (AREA)
  • Die Bonding (AREA)
JP12315787U 1987-08-13 1987-08-13 Pending JPS6429826U (US07642317-20100105-C00010.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12315787U JPS6429826U (US07642317-20100105-C00010.png) 1987-08-13 1987-08-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12315787U JPS6429826U (US07642317-20100105-C00010.png) 1987-08-13 1987-08-13

Publications (1)

Publication Number Publication Date
JPS6429826U true JPS6429826U (US07642317-20100105-C00010.png) 1989-02-22

Family

ID=31371751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12315787U Pending JPS6429826U (US07642317-20100105-C00010.png) 1987-08-13 1987-08-13

Country Status (1)

Country Link
JP (1) JPS6429826U (US07642317-20100105-C00010.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63106069U (US07642317-20100105-C00010.png) * 1986-12-27 1988-07-08

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153339A (ja) * 1982-03-05 1983-09-12 Mitsubishi Electric Corp 混成集積回路体の製造方法
JPS61295656A (ja) * 1985-06-25 1986-12-26 Toshiba Corp イメ−ジセンサ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58153339A (ja) * 1982-03-05 1983-09-12 Mitsubishi Electric Corp 混成集積回路体の製造方法
JPS61295656A (ja) * 1985-06-25 1986-12-26 Toshiba Corp イメ−ジセンサ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63106069U (US07642317-20100105-C00010.png) * 1986-12-27 1988-07-08

Similar Documents

Publication Publication Date Title
JPS5887234U (ja) タツチスイツチの配線構造
JPS6429826U (US07642317-20100105-C00010.png)
JPS6435760U (US07642317-20100105-C00010.png)
JPS6186970U (US07642317-20100105-C00010.png)
JPH01176936U (US07642317-20100105-C00010.png)
JPS63136360U (US07642317-20100105-C00010.png)
JPH0191266U (US07642317-20100105-C00010.png)
JPH01146559U (US07642317-20100105-C00010.png)
JPH031548U (US07642317-20100105-C00010.png)
JPS6122370U (ja) 光起電力素子
JPS6169828U (US07642317-20100105-C00010.png)
JPH0183340U (US07642317-20100105-C00010.png)
JPS61201348U (US07642317-20100105-C00010.png)
JPS6169869U (US07642317-20100105-C00010.png)
JPS6157545U (US07642317-20100105-C00010.png)
JPS62109465U (US07642317-20100105-C00010.png)
JPH0272552U (US07642317-20100105-C00010.png)
JPH0184452U (US07642317-20100105-C00010.png)
JPS639157U (US07642317-20100105-C00010.png)
JPS61199043U (US07642317-20100105-C00010.png)
JPH0351872U (US07642317-20100105-C00010.png)
JPS6357744U (US07642317-20100105-C00010.png)
JPH0330445U (US07642317-20100105-C00010.png)
JPS63119246U (US07642317-20100105-C00010.png)
JPH032661U (US07642317-20100105-C00010.png)