JPS6427718U - - Google Patents
Info
- Publication number
- JPS6427718U JPS6427718U JP12294987U JP12294987U JPS6427718U JP S6427718 U JPS6427718 U JP S6427718U JP 12294987 U JP12294987 U JP 12294987U JP 12294987 U JP12294987 U JP 12294987U JP S6427718 U JPS6427718 U JP S6427718U
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- backup
- memory
- backup power
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007423 decrease Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 238000007689 inspection Methods 0.000 description 1
Landscapes
- Power Sources (AREA)
Description
第1図は本考案に係わるメモリのバツテリバツ
クアツプ回路の第1実施例を示す構成図、第2図
は同回路の動作タイミング図、第3図は本考案回
路の第2実施例を示す構成図、第4図は従来回路
を示す構成図である。
1…メモリ、2,5,7…ダイオード、3…第
1システム電源、4…バツクアツプ電源、6…第
2システム電源、20…マイクロプロセツサ、2
1…インバータ、23…バツクアツプ電源検査回
路、24…コンパレータ、25…基準電圧作成回
路、27…警報回路。
FIG. 1 is a configuration diagram showing a first embodiment of a memory battery backup circuit according to the present invention, FIG. 2 is an operation timing diagram of the circuit, and FIG. 3 is a configuration diagram showing a second embodiment of the circuit according to the present invention. FIG. 4 is a configuration diagram showing a conventional circuit. DESCRIPTION OF SYMBOLS 1... Memory, 2, 5, 7... Diode, 3... First system power supply, 4... Backup power supply, 6... Second system power supply, 20... Microprocessor, 2
DESCRIPTION OF SYMBOLS 1... Inverter, 23... Backup power supply inspection circuit, 24... Comparator, 25... Reference voltage creation circuit, 27... Alarm circuit.
Claims (1)
電源への充電を行う主電源の電圧レベルが低下し
たときに前記メモリへの電力供給を前記バツクア
ツプ電源により行うメモリのバツテリバツクアツ
プ回路において、前記主電源から前記メモリに電
力を供給しているときに前記バツクアツプ電源へ
の充電をしや断する充電しや断回路と、前記バツ
クアツプ電源への充電がしや断されているときに
前記バツクアツプ電源の出力電圧レベルと基準電
圧レベルとを比較して前記バツクアツプ電源の検
査を行うバツクアツプ電源検査回路とを具備した
ことを特徴とするメモリのバツテリバツクアツプ
回路。 In a memory battery backup circuit that supplies power to the memory from the backup power supply when the voltage level of a main power supply that supplies power to the memory and charges the backup power supply decreases, the main power supply charges the memory from the main power supply. a charging cutoff circuit that cuts off charging to the backup power source when power is being supplied to the backup power source; and an output voltage level of the backup power source when charging to the backup power source is cut off soon. A battery backup circuit for a memory, comprising: a backup power supply testing circuit for testing the backup power supply by comparing it with a reference voltage level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12294987U JPS6427718U (en) | 1987-08-11 | 1987-08-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12294987U JPS6427718U (en) | 1987-08-11 | 1987-08-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6427718U true JPS6427718U (en) | 1989-02-17 |
Family
ID=31371355
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12294987U Pending JPS6427718U (en) | 1987-08-11 | 1987-08-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6427718U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60254215A (en) * | 1984-05-30 | 1985-12-14 | Mitsumi Electric Co Ltd | Battery backup circuit |
JPS6116632B2 (en) * | 1984-05-21 | 1986-05-01 | Ricoh Kk |
-
1987
- 1987-08-11 JP JP12294987U patent/JPS6427718U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6116632B2 (en) * | 1984-05-21 | 1986-05-01 | Ricoh Kk | |
JPS60254215A (en) * | 1984-05-30 | 1985-12-14 | Mitsumi Electric Co Ltd | Battery backup circuit |
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