JPS6427389A - Recording or reproducing circuit for video signal - Google Patents

Recording or reproducing circuit for video signal

Info

Publication number
JPS6427389A
JPS6427389A JP63060782A JP6078288A JPS6427389A JP S6427389 A JPS6427389 A JP S6427389A JP 63060782 A JP63060782 A JP 63060782A JP 6078288 A JP6078288 A JP 6078288A JP S6427389 A JPS6427389 A JP S6427389A
Authority
JP
Japan
Prior art keywords
signal
luminance
adder
video signal
chrominance signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63060782A
Other languages
Japanese (ja)
Inventor
Noriaki Minami
Masayoshi Urushiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP63060782A priority Critical patent/JPS6427389A/en
Publication of JPS6427389A publication Critical patent/JPS6427389A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the production of cross color and cross luminance by providing a decode means applying signal processing including time base expansion to a received video signal to form a luminance signal Y and a couple of chrominance signals U, V, two modulation means modulating respectively the luminance signal Y and a couple of the chrominance signals U, V respectively and an adder means. CONSTITUTION:A video signal of the MAC system connected to an input terminal 19 is demodulated into the luminance signal Y and the chrominance signals U, V by the MAC decoder 1 being a decode means. The Y signal is added with a composite synchronizing signal (c) from a timing generator 4 by an adder 20, and connected to one input terminal of an adder 21 via an emphasis circuit and an FM modulation circuit 6. Moreover, the signals U,V are fed to a modulator 7 and modulation is applied by using carriers a, b from a carrier generating circuit 8. Then they are added by the adder 21 mutually and then it is not required to apply processing of the composite video signal separated into the luminance signal and the chrominance signals because the sum is recorded on a recording medium. Thus, the cross color and cross luminance attended with the signal separation are not caused.
JP63060782A 1987-03-20 1988-03-15 Recording or reproducing circuit for video signal Pending JPS6427389A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63060782A JPS6427389A (en) 1987-03-20 1988-03-15 Recording or reproducing circuit for video signal

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP6690487 1987-03-20
JP63060782A JPS6427389A (en) 1987-03-20 1988-03-15 Recording or reproducing circuit for video signal

Publications (1)

Publication Number Publication Date
JPS6427389A true JPS6427389A (en) 1989-01-30

Family

ID=26401841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63060782A Pending JPS6427389A (en) 1987-03-20 1988-03-15 Recording or reproducing circuit for video signal

Country Status (1)

Country Link
JP (1) JPS6427389A (en)

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