JPS6425884U - - Google Patents
Info
- Publication number
- JPS6425884U JPS6425884U JP11820087U JP11820087U JPS6425884U JP S6425884 U JPS6425884 U JP S6425884U JP 11820087 U JP11820087 U JP 11820087U JP 11820087 U JP11820087 U JP 11820087U JP S6425884 U JPS6425884 U JP S6425884U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- capacitor
- control circuit
- charge
- starting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 11
- 238000009499 grossing Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 6
- 230000002159 abnormal effect Effects 0.000 description 1
Landscapes
- Dc-Dc Converters (AREA)
Description
第1図は本考案の一実施例の配線図、第2図は
前記実施例の動作を説明するためのPUTのゲー
ト電圧・アノード電圧の波形図、第3図は従来例
の配線図、第4図は従来例の第2図と対応するP
UTのゲート電圧・アノード電圧の波形図、第5
図は従来例における異常現象を示す図である。
3……ダイオード、4……ツエナダイオード、
5……起動用コンデンサ(コンデンサ)、6…
…スイツチ回路、7……PUT、8……トランジ
スタ、9……平滑用コンデンサ(コンデンサ)
、10……PWM制御回路、11……トランジス
タ、13……主コイル、14……副コイル、20
……ツエナダイオード、21,22……抵抗、2
3……トランジスタ、100……起動回路、10
1……主変圧器、102……帰還信号。
Fig. 1 is a wiring diagram of an embodiment of the present invention, Fig. 2 is a waveform diagram of the gate voltage and anode voltage of PUT to explain the operation of the embodiment, Fig. 3 is a wiring diagram of a conventional example, and Fig. 3 is a wiring diagram of a conventional example. Figure 4 corresponds to Figure 2 of the conventional example.
UT gate voltage/anode voltage waveform diagram, 5th
The figure is a diagram showing an abnormal phenomenon in a conventional example. 3...Diode, 4...Zena diode,
5... Starting capacitor (capacitor), 6...
...Switch circuit, 7...PUT, 8...Transistor, 9...Smoothing capacitor (capacitor)
, 10...PWM control circuit, 11...transistor, 13...main coil, 14...sub-coil, 20
...Zena diode, 21, 22...Resistor, 2
3... Transistor, 100... Starting circuit, 10
1... Main transformer, 102... Feedback signal.
Claims (1)
動用コンデンサに電荷を充電し、PUT(プログ
ラマブル ユニジヤンクシヨン トランジスタ)
のオンオフにより制御されるスイツチ回路をとお
して、前記電荷をPWM制御回路の電源ラインの
平滑用コンデンサに移転し、前記平滑用コンデン
サの電圧を発生し、PWM制御回路に電源電圧と
して印加させる起動回路において、前記PUTの
ゲート電位を定めるために、ツエナダイオードに
よる一定電圧に、前記平滑用コンデンサ電圧(P
WM制御回路の電源電圧)が加わるように結線し
、かつ前記起動用コンデンサにツエナダイオード
を並列に接続して、その電圧上昇の上限をおさえ
ることにより、前記起動用コンデンサの充電電荷
を起動当初に移転した後、PWM制御回路の作動
によりPUTのゲート電位がアノード電位より常
に高くならしめるとともに、スイツチングレギユ
レータをオフとするときに、起動用コンデンサの
電荷を放電させる手段を設けたことを特徴とする
起動回路。 To start the separately excited switching regulator, charge the starting capacitor and use the PUT (programmable unidirectional transistor).
A startup circuit that transfers the electric charge to a smoothing capacitor on a power line of the PWM control circuit through a switch circuit controlled by turning on and off, generates a voltage in the smoothing capacitor, and applies the voltage to the PWM control circuit as a power supply voltage. In order to determine the gate potential of the PUT, the smoothing capacitor voltage (P
By connecting the wires so that the power supply voltage of the WM control circuit is applied, and by connecting a Zener diode in parallel to the starting capacitor to suppress the upper limit of the voltage rise, the charge in the starting capacitor can be reduced at the beginning of startup. After the transfer, the PWM control circuit operates to ensure that the PUT gate potential is always higher than the anode potential, and a means is provided to discharge the charge in the startup capacitor when the switching regulator is turned off. Features a starting circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11820087U JPS6425884U (en) | 1987-08-03 | 1987-08-03 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11820087U JPS6425884U (en) | 1987-08-03 | 1987-08-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6425884U true JPS6425884U (en) | 1989-02-14 |
Family
ID=31362351
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11820087U Pending JPS6425884U (en) | 1987-08-03 | 1987-08-03 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6425884U (en) |
-
1987
- 1987-08-03 JP JP11820087U patent/JPS6425884U/ja active Pending
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