JPS6423405A - Data discriminating circuit for digital magnetic recorder - Google Patents

Data discriminating circuit for digital magnetic recorder

Info

Publication number
JPS6423405A
JPS6423405A JP17920687A JP17920687A JPS6423405A JP S6423405 A JPS6423405 A JP S6423405A JP 17920687 A JP17920687 A JP 17920687A JP 17920687 A JP17920687 A JP 17920687A JP S6423405 A JPS6423405 A JP S6423405A
Authority
JP
Japan
Prior art keywords
signal
circuit
zero cross
jitter
supplied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17920687A
Other languages
Japanese (ja)
Inventor
Kazuo Isaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17920687A priority Critical patent/JPS6423405A/en
Publication of JPS6423405A publication Critical patent/JPS6423405A/en
Pending legal-status Critical Current

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  • Digital Magnetic Recording (AREA)

Abstract

PURPOSE:To remarkably improve the accuracy of data discrimination by using a low pass filter built in a variable frequency oscillator so as to eliminate completely the jitter included in an output signal of a zero cross circuit. CONSTITUTION:An input analog signal S1 is supplied to a differentiation circuit 1, where the signal is converted into a signal S2 representing a zero cross point corresponding to the peak point of the signal S1, and the result is given to a zero cross circuit 2, from which a signal S3 whose level changes from a high to a low level at the zero cross point is supplied. The significant part of the signal S3 as a data is a part descending to a low level from a high level, and since jitter is included in the significant part, the signal S3 is supplied to a variable frequency oscillator 3 incorporating a low pass filter, where the jitter is eliminated and the resulting signal S4 is given to a discrimination logic circuit 5. Simultaneously the signal S1 is fed to an amplitude detection circuit 4, from which a high level signal S5 is given to the circuit 5 and a discriminated signal S6 is obtained.
JP17920687A 1987-07-20 1987-07-20 Data discriminating circuit for digital magnetic recorder Pending JPS6423405A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17920687A JPS6423405A (en) 1987-07-20 1987-07-20 Data discriminating circuit for digital magnetic recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17920687A JPS6423405A (en) 1987-07-20 1987-07-20 Data discriminating circuit for digital magnetic recorder

Publications (1)

Publication Number Publication Date
JPS6423405A true JPS6423405A (en) 1989-01-26

Family

ID=16061782

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17920687A Pending JPS6423405A (en) 1987-07-20 1987-07-20 Data discriminating circuit for digital magnetic recorder

Country Status (1)

Country Link
JP (1) JPS6423405A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007091275A (en) * 2005-09-29 2007-04-12 Ckd Corp Apparatus and system for manufacturing ptp sheet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007091275A (en) * 2005-09-29 2007-04-12 Ckd Corp Apparatus and system for manufacturing ptp sheet

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