JPS6423192U - - Google Patents
Info
- Publication number
- JPS6423192U JPS6423192U JP1987118007U JP11800787U JPS6423192U JP S6423192 U JPS6423192 U JP S6423192U JP 1987118007 U JP1987118007 U JP 1987118007U JP 11800787 U JP11800787 U JP 11800787U JP S6423192 U JPS6423192 U JP S6423192U
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- signal processing
- integrated circuit
- ground potential
- processing integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 3
Landscapes
- Selective Calling Equipment (AREA)
- Details Of Television Systems (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Structure Of Printed Boards (AREA)
Description
第１図は本考案によるリモートコントロールの
受光装置の一例の外観斜視図、第２図はその分解
斜視図、第３図はその基板の裏面図、第４図は従
来装置の断面図である。
１はシールドケース、２は受光窓部、３は受光
素子、４は基板、５は配線パターン、６は信号処
理集積回路である。
FIG. 1 is an external perspective view of an example of a remote control light receiving device according to the present invention, FIG. 2 is an exploded perspective view thereof, FIG. 3 is a back view of its substrate, and FIG. 4 is a sectional view of a conventional device. 1 is a shield case, 2 is a light receiving window, 3 is a light receiving element, 4 is a substrate, 5 is a wiring pattern, and 6 is a signal processing integrated circuit.
Claims (1)
と共に、この面に信号処理集積回路を配置し、 他方の面に他の回路部品をマウントし、 上記配線パターンに、上記信号処理集積回路の
入出力間を分離する接地電位とされる第１の配線
パターンと、上記基板の周囲に配され接地電位と
される第２の配線パターンとが設けられて成るリ
モートコントロールの受光装置。[Scope of Claim for Utility Model Registration] A wiring pattern is placed only on one side of the board, a signal processing integrated circuit is placed on this side, and other circuit components are mounted on the other side, and the above wiring pattern is A remote control comprising: a first wiring pattern that separates the input and output of the signal processing integrated circuit and has a ground potential; and a second wiring pattern that is arranged around the substrate and has a ground potential. Light receiving device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987118007U JPS6423192U (en) | 1987-07-31 | 1987-07-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987118007U JPS6423192U (en) | 1987-07-31 | 1987-07-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6423192U true JPS6423192U (en) | 1989-02-07 |
Family
ID=31361980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987118007U Pending JPS6423192U (en) | 1987-07-31 | 1987-07-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6423192U (en) |
-
1987
- 1987-07-31 JP JP1987118007U patent/JPS6423192U/ja active Pending
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