JPS641868B2 - - Google Patents
Info
- Publication number
- JPS641868B2 JPS641868B2 JP54144210A JP14421079A JPS641868B2 JP S641868 B2 JPS641868 B2 JP S641868B2 JP 54144210 A JP54144210 A JP 54144210A JP 14421079 A JP14421079 A JP 14421079A JP S641868 B2 JPS641868 B2 JP S641868B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- dropout
- address
- period
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000001514 detection method Methods 0.000 claims description 17
- 238000000926 separation method Methods 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000006378 damage Effects 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000001447 compensatory effect Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
Description
【発明の詳細な説明】
本発明は記録情報再生装置に関し特に情報検索
のためのアドレス信号を含む記録情報の再生装置
に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a recorded information reproducing apparatus, and more particularly to a recorded information reproducing apparatus including an address signal for information retrieval.
ビデオデイスク等の記録媒体には、ビデオ及び
オーデイオ情報の他に、これら情報の検索を容易
にするためにアドレス信号を含んで記録される。 In addition to video and audio information, a recording medium such as a video disk includes an address signal to facilitate retrieval of this information.
一方、再生信号におけるドロツプアウト現象は
避けられずよつて再生信号の補償をなすべくドロ
ツプアウト補償装置が付加されることが多い。
かゝるドロツプアウト補償機能を有する場合にお
いて、再生信号中のアドレス信号相当期間にドロ
ツプアウトが生ずれば、当然ドロツプアウト補償
がなされてその間例えば1H(1ライン)前の信号
と置換されることになる。その結果アドレス信号
としては正規の信号は導出されないばかりか全く
異なる補償信号が導出されることになり、情報検
索の誤動作を生じてその信頼度を著しく低下させ
ることになつて好ましくない。 On the other hand, since the dropout phenomenon in the reproduced signal is unavoidable, a dropout compensation device is often added to compensate for the reproduced signal.
In the case where such a dropout compensation function is provided, if a dropout occurs in the period corresponding to the address signal in the reproduced signal, dropout compensation will naturally be performed and the signal will be replaced with the previous signal, for example, 1H (one line) during that time. As a result, not only a normal signal is not derived as the address signal, but also a completely different compensation signal is derived, which is undesirable because it causes malfunctions in information retrieval and significantly reduces its reliability.
従つて、本発明ではアドレス信号区間において
ドロツプアウトが発生した場合ドロツプアウトの
補償動作を停止せしめるようにして誤つたアドレ
ス信号等と置換されることのないようにした記録
情報再生装置を提供せんとすることを目的として
いる。 Therefore, it is an object of the present invention to provide a recorded information reproducing apparatus which stops the dropout compensation operation when a dropout occurs in an address signal section, thereby preventing the dropout from being replaced with an erroneous address signal, etc. It is an object.
以下、本発明を図面を用いて説明する。 Hereinafter, the present invention will be explained using the drawings.
図は本発明の実施例を示す概略ブロツク図であ
り、アドレス信号を含む再生RF信号は復調器1
により復調されてアンプ2において増幅後、ドロ
ツプアウト補償のための切換回路3へ印加され
る。また再生RF信号は1H遅延回路4に入力され
て1Hだけ遅延され復調器5により復調後、アン
プ6にて増幅されて先の切換回路3へ入力され
る。更にドロツプアウト検出回路7が設けられて
再生RF信号中のドロツプアウトが検出されて高
レベルの検出信号が2入力アンドゲート8の1入
力となり、このゲート出力が切換回路3の切換制
御信号となる。 The figure is a schematic block diagram showing an embodiment of the present invention, in which the reproduced RF signal including the address signal is transmitted to the demodulator 1.
After being demodulated by and amplified by an amplifier 2, the signal is applied to a switching circuit 3 for dropout compensation. The reproduced RF signal is input to the 1H delay circuit 4, delayed by 1H, demodulated by the demodulator 5, amplified by the amplifier 6, and input to the switching circuit 3. Further, a dropout detection circuit 7 is provided to detect a dropout in the reproduced RF signal, and the high level detection signal becomes one input of a two-input AND gate 8, and the output of this gate becomes a switching control signal for the switching circuit 3.
切換回路3の出力はそのまゝビデオ信号出力と
なると共に、LPF9、アンプ10及びペデスタ
ルクランプ回路11を経て同期分離回路12及び
アドレス分離回路13へ入力される。同期分離回
路12の同期分離出力からアドレス信号挿入区間
を検出して低レベルの検出信号を発生するアドレ
ス区間検出回路14が設けられており、アドレス
分離回路13においてこの検出信号の存在期間中
クランプ出力のアドレス信号がゲートされて分離
導出されるものである。こゝでアドレス信号は同
期信号中の例えば垂直ブランキング期間のある一
定区間内に挿入されているものであるから、アド
レス区間検出回路14においては、垂直同期信号
の初期タイミングを検出してそれから一定期間遅
延して所定幅の検出信号を発生するようにし、こ
れをゲートパルスとするように構成される。 The output of the switching circuit 3 directly becomes a video signal output, and is also inputted to a sync separation circuit 12 and an address separation circuit 13 via an LPF 9, an amplifier 10, and a pedestal clamp circuit 11. An address section detection circuit 14 is provided which detects an address signal insertion section from the synchronization separation output of the synchronization separation circuit 12 and generates a low-level detection signal.The address separation circuit 13 outputs a clamp output during the existence period of this detection signal. address signals are gated and separately derived. Here, since the address signal is inserted within a certain period of the synchronization signal, for example, the vertical blanking period, the address period detection circuit 14 detects the initial timing of the vertical synchronization signal and then It is configured to generate a detection signal with a predetermined width after a period of delay, and use this as a gate pulse.
そして本発明においては、当該アドレス区間検
出信号を2入力アンドゲートの他入力とするよう
にしたものである。 In the present invention, the address section detection signal is provided as the other input of the two-input AND gate.
かゝる構成において、ドロツプアウト現象がな
い通常動作状態ではドロツプアウト検出信号は低
レベルであり、またアドレス区間検出信号は高レ
ベル又は低レベルとなつているために、アンドゲ
ート8の出力は低レベルであるから、この時切換
回路3はアンプ2の出力を選択するように制御さ
れるものとすると、正規のビデオ信号、同期信号
及びアドレス信号が出力されることになる。 In such a configuration, in a normal operating state without dropout phenomenon, the dropout detection signal is at a low level, and the address interval detection signal is at a high or low level, so the output of the AND gate 8 is at a low level. Therefore, if the switching circuit 3 is controlled to select the output of the amplifier 2 at this time, a regular video signal, synchronization signal, and address signal will be output.
次にアドレス区間外にドロツプアウトが生じれ
ば、ドロツプアウト検出信号は高レベルに遷移
し、そしてアドレス区間検出信号は高レベルの
まゝにあるから、アンドゲート8の出力は高レベ
ルとなつて、切換回路3はアンプ6の出力を選択
して1H遅延した信号が出力されドロツプアウト
補償がなされる。 Next, if a dropout occurs outside the address interval, the dropout detection signal transitions to a high level, and since the address interval detection signal remains at a high level, the output of the AND gate 8 becomes a high level, and switching is performed. The circuit 3 selects the output of the amplifier 6 and outputs a signal delayed by 1H to perform dropout compensation.
更にアドレス区間ではアドレス区間検出信号が
低レベルに遷移するから、アドレス区間でドロツ
プアウトが生じてもアンドゲート8の出力は低レ
ベルとなつて切換回路3はアンプ2の出力を選択
し、もつてドロツプアウト補償動作はなされない
ことになる。よつて、アドレス区間には誤つたア
ドレス情報等が置換されることがなくなつて好都
合である。 Furthermore, since the address interval detection signal transitions to a low level in the address interval, even if a dropout occurs in the address interval, the output of the AND gate 8 becomes a low level, and the switching circuit 3 selects the output of the amplifier 2, thereby causing a dropout. No compensatory action will be taken. Therefore, it is advantageous that erroneous address information or the like is not replaced in the address section.
ところで、アドレス区間でドロツプアウトがあ
ると、データの一部が破壊されることになるが、
一般に、ビデオデイスクシステムにおけるドロツ
プアウトは短いので、このドロツプアウトに対し
て補償を行なうと、破壊された部分よりも長い区
間に亘つて信号の置換が行なわれてしまうことに
なる。この場合、アドレス信号は1H前のデータ
と相関性がなく、データの破壊をさらに拡大する
ことになり、符号誤り訂正の能力を越え、データ
を読めない確率が増すことになる。 By the way, if there is a dropout in the address area, part of the data will be destroyed.
In general, dropouts in video disc systems are short, so if compensation is made for this dropout, the signal will be replaced over an area longer than the destroyed portion. In this case, the address signal has no correlation with the data from 1H before, and the data destruction will further expand, exceeding the code error correction ability and increasing the probability that the data cannot be read.
すなわち、ビデオ信号に関してはライン相関が
あるので1H前の信号との置換によるドロツプア
ウト補償が可能であるが、アドレス信号の場合に
は、補償の有無に拘らずデータが破壊されること
になるが、ドロツプアウト補償を行なわない方が
破壊の程度は非常に少なく、符号誤り訂正能力の
範囲内となる確率が高くなり、ドロツプアウトに
より破壊されたデータを符号誤り訂正で補償でき
るので、アドレス区間ではドロツプアウトの補償
動作を禁止することにより、誤動作を未然に防止
できるのである。 In other words, since there is a line correlation for video signals, it is possible to compensate for dropouts by replacing the signal with a signal from 1H earlier, but in the case of address signals, data will be destroyed regardless of whether compensation is used or not. If dropout compensation is not performed, the degree of destruction will be much smaller, and the probability that it will be within the code error correction capability will be higher. Data destroyed by dropout can be compensated for by code error correction, so dropout compensation is not required in the address area. By prohibiting the operation, malfunctions can be prevented.
このように本発明においては、アドレス区間の
ドロツプアウトについては1H遅延した信号と置
換することがないために、誤つたアドレスが挿入
されないから、誤検索をなすことはないものであ
る。 As described above, in the present invention, since a dropout in an address section is not replaced with a signal delayed by 1H, an erroneous address is not inserted, and erroneous retrieval does not occur.
尚、上記に示したブロツク図は単なる一例を示
すにすぎず、種々の改変が可変であることは勿論
である。 It should be noted that the block diagram shown above merely shows an example, and it goes without saying that various modifications can be made.
図は本発明の実施例を示すブロツク図である。
主要部分の符号の説明、3……信号切換回路、
7……ドロツプアウト検出回路、8……アンドゲ
ート、14……アドレス区間検出回路。
The figure is a block diagram showing an embodiment of the present invention. Explanation of symbols of main parts, 3...Signal switching circuit,
7... Dropout detection circuit, 8... AND gate, 14... Address section detection circuit.
Claims (1)
報の再生信号におけるドロツプアウトを検出して
ドロツプアウト補償をなすドロツプアウト補償回
路を有する記録情報再生装置であつて、前記ドロ
ツプアウト補償回路の出力信号における前記アド
レス信号挿入期間を検出してその間検出信号を発
生する手段と、前記検出信号の発生期間前記ドロ
ツプアウト補償回路の補償動作を停止せしめる手
段とを含んでなる記録情報再生装置。1. A recorded information reproducing apparatus having a dropout compensation circuit that detects a dropout in a reproduced signal of recorded information including an address signal for information retrieval and performs dropout compensation, wherein the address signal is inserted into the output signal of the dropout compensation circuit. A recorded information reproducing apparatus comprising: means for detecting a period and generating a detection signal during the period; and means for stopping the compensation operation of the dropout compensation circuit during the period during which the detection signal is generated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14421079A JPS5668973A (en) | 1979-11-07 | 1979-11-07 | Reproducing device for record information containing address signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14421079A JPS5668973A (en) | 1979-11-07 | 1979-11-07 | Reproducing device for record information containing address signal |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP34405989A Division JPH02216675A (en) | 1989-12-28 | 1989-12-28 | Reproducing device for recording information including address signal |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5668973A JPS5668973A (en) | 1981-06-09 |
JPS641868B2 true JPS641868B2 (en) | 1989-01-12 |
Family
ID=15356784
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14421079A Granted JPS5668973A (en) | 1979-11-07 | 1979-11-07 | Reproducing device for record information containing address signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5668973A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008123504A1 (en) | 2007-03-30 | 2008-10-16 | Fujifilm Corporation | Ultraviolet ray absorber composition |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5882080U (en) * | 1981-11-27 | 1983-06-03 | 株式会社東芝 | signal detection device |
JPS6171783A (en) * | 1984-09-14 | 1986-04-12 | Victor Co Of Japan Ltd | Drop-out detecting circuit |
JPH01106683A (en) * | 1987-10-20 | 1989-04-24 | Victor Co Of Japan Ltd | Method for reproducing information recording medium |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5121727A (en) * | 1974-08-17 | 1976-02-21 | Teac Corp | |
JPS5945276B2 (en) * | 1976-09-13 | 1984-11-05 | 三洋電機株式会社 | Dropout compensation circuit |
-
1979
- 1979-11-07 JP JP14421079A patent/JPS5668973A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008123504A1 (en) | 2007-03-30 | 2008-10-16 | Fujifilm Corporation | Ultraviolet ray absorber composition |
Also Published As
Publication number | Publication date |
---|---|
JPS5668973A (en) | 1981-06-09 |
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