JPS6417264A - Signal processor for magnetic card reader - Google Patents
Signal processor for magnetic card readerInfo
- Publication number
- JPS6417264A JPS6417264A JP62173558A JP17355887A JPS6417264A JP S6417264 A JPS6417264 A JP S6417264A JP 62173558 A JP62173558 A JP 62173558A JP 17355887 A JP17355887 A JP 17355887A JP S6417264 A JPS6417264 A JP S6417264A
- Authority
- JP
- Japan
- Prior art keywords
- shift register
- read clock
- card reader
- counter
- signal processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
PURPOSE:To output the residual data inside a shift register by converting it in a parallel signal from a serial signal to a CPU by inputting a dummy read clock to a shift register and counter after completing the read clock of a card reader. CONSTITUTION:A dummy read clock CLKK is inputted into a shift register 3 and counter 4 in place of a read clock RCLK after completion of the read clock of a card reader 1. The read data RDT of the shift register 3 is thus shifted in order and the dummy read clock CLKK is counted as well in succession to the read clock RCLK by the counter 4, and the content of the shift register 3 is latched by a latch circuit 6 with the counter output outputted on each clock in specified number. All of the data can be thus outputted to a CPU in the state of no residual data inside the shift register.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62173558A JPS6417264A (en) | 1987-07-10 | 1987-07-10 | Signal processor for magnetic card reader |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62173558A JPS6417264A (en) | 1987-07-10 | 1987-07-10 | Signal processor for magnetic card reader |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6417264A true JPS6417264A (en) | 1989-01-20 |
Family
ID=15962775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62173558A Pending JPS6417264A (en) | 1987-07-10 | 1987-07-10 | Signal processor for magnetic card reader |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6417264A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0395208A2 (en) * | 1989-04-27 | 1990-10-31 | Advanced Micro Devices, Inc. | Bit residue correction in DLC receivers |
| JP2006040098A (en) * | 2004-07-29 | 2006-02-09 | Matsushita Electric Ind Co Ltd | Information reader and information reading system |
-
1987
- 1987-07-10 JP JP62173558A patent/JPS6417264A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0395208A2 (en) * | 1989-04-27 | 1990-10-31 | Advanced Micro Devices, Inc. | Bit residue correction in DLC receivers |
| JP2006040098A (en) * | 2004-07-29 | 2006-02-09 | Matsushita Electric Ind Co Ltd | Information reader and information reading system |
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