JPS641547A - Image forming apparatus - Google Patents
Image forming apparatusInfo
- Publication number
- JPS641547A JPS641547A JP62282832A JP28283287A JPS641547A JP S641547 A JPS641547 A JP S641547A JP 62282832 A JP62282832 A JP 62282832A JP 28283287 A JP28283287 A JP 28283287A JP S641547 A JPS641547 A JP S641547A
- Authority
- JP
- Japan
- Prior art keywords
- transistors
- inverters
- gamma
- dot
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Fax Reproducing Arrangements (AREA)
- Facsimile Image Signal Circuits (AREA)
- Dot-Matrix Printers And Others (AREA)
- Laser Beam Printer (AREA)
- Exposure Or Original Feeding In Electrophotography (AREA)
- Facsimile Scanning Arrangements (AREA)
Abstract
PURPOSE:To perform multi-gradation expression without deteriorating resolving power, by providing a value other than two white and black values to one dot and performing gradation expression of three values or more. CONSTITUTION:Inverters 211-21n are connected to the respective n-bit outputs of a gamma-converter circuit 15 and a switch 22 of n-circuit two-contact is connected to the output of each of the inverters. Transistors 231-23n are subjected to ON/OFF control by the n-bit digital signals from the gamma-converter circuit 15 but, since the inverters 21 are provided, the transistors 23 are turned ON when the output of the gamma-converter circuit 15 is an L-level and the current flowing to a laser diode 1 is changed corresponding to the ON-number of the transistors 23 and, when all of the transistors 23 are turned ON, a current iLD does not flow to the laser diode 1 and, when all of the transistors 23 are turned OFF, the max. current flows to the laser diode. Therefore, gradation can be provided to one dot by changing the power of laser beam at every one dot and an image of high resolving power can be expressed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-282832A JPH011547A (en) | 1987-01-20 | 1987-11-09 | image forming device |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-10859 | 1987-01-20 | ||
JP1085987 | 1987-01-20 | ||
JP62-282832A JPH011547A (en) | 1987-01-20 | 1987-11-09 | image forming device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS641547A true JPS641547A (en) | 1989-01-05 |
JPH011547A JPH011547A (en) | 1989-01-05 |
Family
ID=
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2372412A1 (en) | 2010-03-26 | 2011-10-05 | Fujifilm Corporation | Patterned birefringent product |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2372412A1 (en) | 2010-03-26 | 2011-10-05 | Fujifilm Corporation | Patterned birefringent product |
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