JPS6413826A - Electric field median detection circuit - Google Patents

Abstract

PURPOSE:To obtain an accurate electric field median by comparing a DC level corresponding to a received electric field with an output of a level converter, integrating the result and using an output of the level converter obtained through the output of the integration device fed back negatively to the level converter. CONSTITUTION:A DC voltage V1 corresponding to a received electric field is obtained from an electric field detection circuit 81 of a receiver 8 is obtained and its level is given to one terminal of a level comparator 51. An output V2 of a level converter 62 is given to the other terminals and a difference is obtained and the result is subjected to integration (61). The integrated result is given to the level converter 62 and its output V2 is fed back negatively to the comparator 51. When a level 1 representing V1>V2 is outputted from the comparator 51, subjected to integration (61) and the output of the integration device 61 gest higher than before and compared (51) again with the voltage V1 via the converter 62. In case of V1<V2, the comparator 51 outputs 0 and the result stays at a point where a 50% of duty factor pulse is outputted from the comparator 51. The voltage V2 at that time is subjected to A/D conversion 71 and the corresponding electric field median is read from a ROM 72. Thus, the electric field median with high accuracy is obtained.