JPS6413727U - - Google Patents

Info

Publication number
JPS6413727U
JPS6413727U JP1987110156U JP11015687U JPS6413727U JP S6413727 U JPS6413727 U JP S6413727U JP 1987110156 U JP1987110156 U JP 1987110156U JP 11015687 U JP11015687 U JP 11015687U JP S6413727 U JPS6413727 U JP S6413727U
Authority
JP
Japan
Prior art keywords
semiconductor chip
transparent substrate
display
substrate
connection electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987110156U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987110156U priority Critical patent/JPS6413727U/ja
Publication of JPS6413727U publication Critical patent/JPS6413727U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の実施例を示す平面図、第2図
は第1図の−断面図、第3図及び第4図は従
来例を示す図である。 1は基板、2は半導体チツプ、3は導線、4は
金属膜、5は遮光層、6は孔、7は半田。
FIG. 1 is a plan view showing an embodiment of the present invention, FIG. 2 is a cross-sectional view taken from FIG. 1, and FIGS. 3 and 4 are views showing a conventional example. 1 is a substrate, 2 is a semiconductor chip, 3 is a conductor, 4 is a metal film, 5 is a light shielding layer, 6 is a hole, and 7 is solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体チツプ表面と表示用透明基板表面とを向
い合せ、前記透明基板上に設けられた複数の導線
先端部の接続電極と前記半導体チツプの接続電極
とが半田で直接フエイスダウンボンデイングされ
た表示用基板において、前記透明基板上に前記透
明基板と前記半導体チツプとの重なり面積よりも
大きく形成され、且つ、前記半導体チツプの接続
電極と前記導線の接続電極とを接触させるための
孔を有したネガ型感光性組成物より成る遮光層を
備えたことを特徴とする表示用基板。
A display substrate in which the surface of a semiconductor chip and the surface of a transparent substrate for display are faced to each other, and connection electrodes at the tips of a plurality of conductive wires provided on the transparent substrate and connection electrodes of the semiconductor chip are directly face-down bonded with solder. , a negative type having a hole formed on the transparent substrate to be larger than the overlapping area of the transparent substrate and the semiconductor chip, and for bringing the connection electrode of the semiconductor chip into contact with the connection electrode of the conductive wire. A display substrate comprising a light-shielding layer made of a photosensitive composition.
JP1987110156U 1987-07-17 1987-07-17 Pending JPS6413727U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987110156U JPS6413727U (en) 1987-07-17 1987-07-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987110156U JPS6413727U (en) 1987-07-17 1987-07-17

Publications (1)

Publication Number Publication Date
JPS6413727U true JPS6413727U (en) 1989-01-24

Family

ID=31347054

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987110156U Pending JPS6413727U (en) 1987-07-17 1987-07-17

Country Status (1)

Country Link
JP (1) JPS6413727U (en)

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