JPS6413551U - - Google Patents

Info

Publication number
JPS6413551U
JPS6413551U JP10989387U JP10989387U JPS6413551U JP S6413551 U JPS6413551 U JP S6413551U JP 10989387 U JP10989387 U JP 10989387U JP 10989387 U JP10989387 U JP 10989387U JP S6413551 U JPS6413551 U JP S6413551U
Authority
JP
Japan
Prior art keywords
circuit
voice
key encoder
system control
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10989387U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10989387U priority Critical patent/JPS6413551U/ja
Publication of JPS6413551U publication Critical patent/JPS6413551U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、本考案の一実施例を示すブロツク図
である。 １……インタフエース、２……システム制御回
路、３……音声分析ＤＰマツチング演算回路、４
……登録メモリ、５……アナログインタフエース
回路、１０……端末装置、２０……キーデータ出
力コード、２１……登録データ、２２……レベル
調整信号、２３……音声分析登録コード、２４…
…音声認識処理コード、３１……処理データ、４
１……検索データ、５０……アナログ音声信号、
５１……デイジタル音声データ。 FIG. 1 is a block diagram showing one embodiment of the present invention. 1...Interface, 2...System control circuit, 3...Speech analysis DP matching calculation circuit, 4
... Registration memory, 5 ... Analog interface circuit, 10 ... Terminal device, 20 ... Key data output code, 21 ... Registration data, 22 ... Level adjustment signal, 23 ... Audio analysis registration code, 24 ...
...Voice recognition processing code, 31...Processing data, 4
1...search data, 50...analog audio signal,
51...Digital audio data.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] アナログ音声信号を入力し、シリアルデイジタ
ル音声データを出力する音声入力用アナログイン
タフエース回路と、システム制御回路と、前記シ
ステム制御回路の制御を受けて音声認識を行う音
声分析圧縮ダイナミツクプログラミングマツチン
グ演算回路と、前記音声認識のための音声分析登
録コードを格納する登録メモリによりキーエンコ
ーダを構成し、前記キーエンコーダに接続される
べき端末装置のキーボード接続用インタフエース
に対応するインタフエースと前記キーエンコーダ
を有することを特徴とする音声入力装置。 An audio input analog interface circuit that inputs an analog audio signal and outputs serial digital audio data, a system control circuit, and a voice analysis compression dynamic programming matching operation that performs voice recognition under the control of the system control circuit. A key encoder is configured by a circuit and a registration memory storing a voice analysis registration code for voice recognition, and an interface corresponding to a keyboard connection interface of a terminal device to be connected to the key encoder and the key encoder. A voice input device comprising:
JP10989387U 1987-07-17 1987-07-17 Pending JPS6413551U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10989387U JPS6413551U (en) 1987-07-17 1987-07-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10989387U JPS6413551U (en) 1987-07-17 1987-07-17

Publications (1)

Publication Number Publication Date
JPS6413551U true JPS6413551U (en) 1989-01-24

Family

ID=31346556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10989387U Pending JPS6413551U (en) 1987-07-17 1987-07-17

Country Status (1)

Country Link
JP (1) JPS6413551U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS565598A (en) * 1979-06-27 1981-01-21 Sanyo Electric Co Input circuit for information processor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS565598A (en) * 1979-06-27 1981-01-21 Sanyo Electric Co Input circuit for information processor

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