JPS6410696U - - Google Patents

Info

Publication number
JPS6410696U
JPS6410696U JP10584187U JP10584187U JPS6410696U JP S6410696 U JPS6410696 U JP S6410696U JP 10584187 U JP10584187 U JP 10584187U JP 10584187 U JP10584187 U JP 10584187U JP S6410696 U JPS6410696 U JP S6410696U
Authority
JP
Japan
Prior art keywords
world
region
pattern data
storage means
key
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10584187U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10584187U priority Critical patent/JPS6410696U/ja
Publication of JPS6410696U publication Critical patent/JPS6410696U/ja
Pending legal-status Critical Current

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  • Electric Clocks (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本考案の一実施例の回路構成図、第
2図は、RAMの構成の一部を示す図、第3図は
、全体の処理を示すフローチヤート、第4図は、
本考案に係る世界時計の外観図、第5図は、動作
モードを説明する図、第6図は、キー処理のフロ
ーチヤート、第7図は、表示処理のフローチヤー
ト、第8図aは、表示部の構成を示す図、同図b
は表示の一例を示す図である。 1……ROM、2……ROMアドレス制御部、
11……表示部。
FIG. 1 is a circuit configuration diagram of an embodiment of the present invention, FIG. 2 is a diagram showing a part of the RAM configuration, FIG. 3 is a flowchart showing the overall processing, and FIG. 4 is a diagram showing a part of the configuration of the RAM.
5 is a diagram explaining the operation mode, FIG. 6 is a flowchart of key processing, FIG. 7 is a flowchart of display processing, and FIG. 8a is an external view of the world clock according to the present invention. A diagram showing the configuration of the display section, Figure b
is a diagram showing an example of a display. 1...ROM, 2...ROM address control unit,
11...Display section.

Claims (1)

【実用新案登録請求の範囲】 世界の複数の地域の時刻を表示する世界時計に
おいて、 世界地図のパターンデータを記憶する記憶手段
と、地域を選択するキー手段と、該キー手段によ
つて選択された地域をほぼ中心とするパターンデ
ータを前記記憶手段から読み出して表示する表示
手段とを有することを特徴とする世界時計。
[Claims for Utility Model Registration] In a world clock that displays the time in multiple regions of the world, there is a storage means for storing pattern data of a world map, a key means for selecting a region, and a region selected by the key means. and display means for reading and displaying pattern data approximately centered on a given region from the storage means.
JP10584187U 1987-07-09 1987-07-09 Pending JPS6410696U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10584187U JPS6410696U (en) 1987-07-09 1987-07-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10584187U JPS6410696U (en) 1987-07-09 1987-07-09

Publications (1)

Publication Number Publication Date
JPS6410696U true JPS6410696U (en) 1989-01-20

Family

ID=31338819

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10584187U Pending JPS6410696U (en) 1987-07-09 1987-07-09

Country Status (1)

Country Link
JP (1) JPS6410696U (en)

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