JPS6410495A - Readout circuit for dynamic ram - Google Patents
Readout circuit for dynamic ramInfo
- Publication number
- JPS6410495A JPS6410495A JP62164544A JP16454487A JPS6410495A JP S6410495 A JPS6410495 A JP S6410495A JP 62164544 A JP62164544 A JP 62164544A JP 16454487 A JP16454487 A JP 16454487A JP S6410495 A JPS6410495 A JP S6410495A
- Authority
- JP
- Japan
- Prior art keywords
- bit line
- potential
- amplifier
- trs
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Dram (AREA)
Abstract
PURPOSE:To attain low power consumption and high speed readout by supplying an amplified voltage of a 1st bit line to a 2nd bit line via a switch element turned on/off pulsively, amplifying the voltage by a required factor and supplying the result to a current mirror amplifier. CONSTITUTION:The information of a memory cell 6 selected by a word line 22 is read out and amplified by a 1st amplifier 5 of FF type driven by an activated transistor (TR) and the potential of the 1st bit line 7 reaches a power voltage VCC. Thus, the switch element 9 is turned on pulsively to connect the line 7 and the 2nd bit line 8 for a short time. Then the potential of the bit line 8 is boosted to a low potential (Vgsp-Vthp)-(Vgsn-Vthn) enough to operate a current mirror amplifier 3 at a high speed by a 2nd amplifier 4 of n/p-channel activated by p/n-channel TRs 11, 10 connecting respectively to the ground and the power supply. Through the high-speed small potential boosting, high-speed readout is attained with less power consumption, where Vgsp, Vgsn are gate and source voltages of TRs 11, 10 and Vthp, Vthn, are the threshold voltages of TRs 11, 10.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62164544A JPS6410495A (en) | 1987-07-01 | 1987-07-01 | Readout circuit for dynamic ram |
KR1019880004321A KR920006981B1 (en) | 1987-04-16 | 1988-04-16 | Semiconductor memory device having sub bit line |
US07/182,895 US4920517A (en) | 1986-04-24 | 1988-04-18 | Semiconductor memory device having sub bit lines |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62164544A JPS6410495A (en) | 1987-07-01 | 1987-07-01 | Readout circuit for dynamic ram |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6410495A true JPS6410495A (en) | 1989-01-13 |
JPH0578120B2 JPH0578120B2 (en) | 1993-10-28 |
Family
ID=15795174
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62164544A Granted JPS6410495A (en) | 1986-04-24 | 1987-07-01 | Readout circuit for dynamic ram |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6410495A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01138687A (en) * | 1987-11-25 | 1989-05-31 | Toshiba Corp | Semiconductor memory device |
WO1996024136A1 (en) * | 1995-01-30 | 1996-08-08 | Hitachi, Ltd. | Semiconductor memory |
KR100269294B1 (en) * | 1997-04-10 | 2000-12-01 | 윤종용 | Semiconductor memory apparatus driving data line throgh low voltage consumption |
-
1987
- 1987-07-01 JP JP62164544A patent/JPS6410495A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01138687A (en) * | 1987-11-25 | 1989-05-31 | Toshiba Corp | Semiconductor memory device |
WO1996024136A1 (en) * | 1995-01-30 | 1996-08-08 | Hitachi, Ltd. | Semiconductor memory |
KR100269294B1 (en) * | 1997-04-10 | 2000-12-01 | 윤종용 | Semiconductor memory apparatus driving data line throgh low voltage consumption |
Also Published As
Publication number | Publication date |
---|---|
JPH0578120B2 (en) | 1993-10-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term | ||
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20071028 Year of fee payment: 14 |