JPS641038B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a display circuit for input/output signals of a control device.

Conventionally, there has been a circuit of this type as shown in FIG. In the figure, SA1 to SA4, SB1 to SB
4, SC1 to SC4 are input signal lines of each block, A1 to A4, B1 to B4, C1 to C4 are NAND elements of the logic circuit, SW is a selection switch for block selection, S1 to S3 are signals for block selection, L
1 to L4 are light emitting diodes, and R1 to R4 are current limiting resistors.

Next, the operation will be explained. Input signal line SA1
Which of the signals from ~SA4, SB1~SB4, SC1~SC4 is sent to the light emitting diode L1~L
4 is displayed using the selection switch SW, and the AND is selected using the block selection signals S1 to S3.
One block of elements A1 to A4, B1 to B4, or C1 to C4 is selected, and the input signal line SA
The light emitting diodes L1 to L are selected according to the signals of 1 to SA4, SB1 to SB4, and SC1 to SC4.
4 is lit and displayed.

Conventional signal display circuits are configured as described above, but they have the disadvantage that the input signals that you want to display must be selected using a switch, and you must select all of them in order to display the entire signal. It was hot.

The present invention has been made in order to eliminate the above-mentioned drawbacks of the conventional art, and it is an object of the present invention to provide a display circuit that can automatically select blocks sequentially using a clock signal and a counter, and can also perform continuous display by operating a switch. purpose.

An embodiment of the present invention will be described below with reference to FIG. In the figure, 1 is a clock signal line 2, 2 is an AND element of a logic circuit, 3 is a clock control switch that controls the clock signal, 4 is a counter circuit that counts the clock according to the clock signal, and sequentially outputs the count value, 5a , 5c are inverter elements of the logic circuit, L5 to L7 are light emitting diodes, R5 to R7 are current control resistors, and other symbols are the same as in FIG.

Next, the operation will be explained. Clock signal line 1
A clock signal is input to the block, and if the clock control switch 3 is turned off, the clock is input to the counter circuit 4, and block selection signals S1 to S3 are sequentially output according to the count value. As a result, input signal lines SA1 to SA4, SB1 to SB
4, SC1 to SC4 are automatically selected in sequence, and display is performed by the light emitting diodes L1 to L4. The counter circuit 4 is constituted by a ternary counter, and the block selection signals S1 to S3 are always repeatedly output. At this time, which block is selected can be determined by the light emitting diodes L5 to L7.
Displayed by

Input signal lines SA1 to SA4, SB1 to SB4, SC1
~ To display only one block of SC4 continuously, turn clock control switch 3 while checking light emitting diodes L5 to L7.
When turned ON, only one necessary block will be displayed continuously.

In addition, in the above example, there were three blocks, but
The same function can be achieved with three or more.

Further, in the above embodiment, the number of signal lines in one block is four, but it goes without saying that the number is not limited to this number.

As described above, according to the present invention, since the input signal block selection circuit is configured by a combination of a clock and a counter circuit, it is possible to automatically display sequentially.
Furthermore, a signal display circuit capable of continuous display by operating a clock control switch can be provided.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional signal display circuit, and FIG. 2 is a block diagram showing a signal display circuit according to an embodiment of the present invention. 1... Clock signal line, 3... Clock control switch, 4... Counter circuit, SA1 to SA4,
SB1~SB4, SC1~SC4...Input signal line, L
1 to L7... Light emitting diode. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1 N×M signal lines into which different binary signals divided into N blocks are input, and a clock signal for selecting the above blocks are counted, and each time the N blocks are counted, the M above An N-ary counter that outputs a block selection signal, and an input of the above clock signal to this N-ary counter.
A clock control switch that turns ON and OFF, and N×M NAND elements to which an input signal is input to one input terminal through each of the above signal lines, and a selection signal for the block is input to the other input terminal. , M light emitting elements to which the output signals of NAND elements of the same order of digit of each block are input in parallel and are driven by the output signals.