JPS6399995A - Ic card and manufacture thereof - Google Patents
Ic card and manufacture thereofInfo
- Publication number
- JPS6399995A JPS6399995A JP61254139A JP25413986A JPS6399995A JP S6399995 A JPS6399995 A JP S6399995A JP 61254139 A JP61254139 A JP 61254139A JP 25413986 A JP25413986 A JP 25413986A JP S6399995 A JPS6399995 A JP S6399995A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- card
- metal plate
- wiring
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000010408 film Substances 0.000 claims description 29
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 11
- 229920005989 resin Polymers 0.000 claims description 11
- 239000004020 conductor Substances 0.000 claims description 6
- 238000001459 lithography Methods 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 claims description 4
- 239000010409 thin film Substances 0.000 claims description 4
- 238000009434 installation Methods 0.000 claims description 3
- 238000000059 patterning Methods 0.000 claims description 2
- 239000000758 substrate Substances 0.000 description 21
- 229910052782 aluminium Inorganic materials 0.000 description 13
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 13
- 239000010410 layer Substances 0.000 description 11
- 229920001721 polyimide Polymers 0.000 description 11
- 239000009719 polyimide resin Substances 0.000 description 10
- 239000011521 glass Substances 0.000 description 7
- 238000002161 passivation Methods 0.000 description 5
- 239000010935 stainless steel Substances 0.000 description 5
- 229910001220 stainless steel Inorganic materials 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 239000004925 Acrylic resin Substances 0.000 description 3
- 229920000178 Acrylic resin Polymers 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000005452 bending Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 230000002265 prevention Effects 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Credit Cards Or The Like (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
（技術分野）
本発明はカードにマイクロコンピュータチップやメモリ
チップなどのＩＣチップを埋め込んだＩＣカードに関す
るものである。DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an IC card in which an IC chip such as a microcomputer chip or a memory chip is embedded in the card.
（従来技術）
従来のＩＣカードは、プラスチック板を打ち抜いて基板
を形成した後、その基板に凹部を形成し、その凹部にＩ
Ｃモジュールを嵌め込み、固着することにより形成され
ている（例えば特開昭５８−１３８０５７号公報、特開
昭５９−２２３５３号公報参照）。(Prior art) In conventional IC cards, after punching out a plastic plate to form a substrate, a recess is formed in the substrate, and an I/O is inserted into the recess.
It is formed by fitting and fixing the C module (see, for example, Japanese Patent Laid-Open No. 58-138057 and Japanese Patent Laid-Open No. 59-22353).
従来のＩＣカードは基板としてプラスチックを用いてい
ることから、折り曲げに対して弱いという欠点を持って
いる。そのためＩＣチップの設置場所が例えばカードの
隅の部分というように、曲げに対して強い場所に制限さ
れるという問題がある。Since conventional IC cards use plastic as a substrate, they have the disadvantage of being susceptible to bending. Therefore, there is a problem in that the installation location of the IC chip is limited to a location that is strong against bending, such as a corner of the card.
また、ＩＣチップの実装方法として、ワイヤボンディン
グ法、テープキャリア法又はフリップチップ法が採用さ
れているので、カードの厚さを薄くする上で障害ともな
っている。Furthermore, since the wire bonding method, tape carrier method, or flip chip method is adopted as a mounting method for the IC chip, it is also an obstacle in reducing the thickness of the card.
（目的）
本発明は、折り曲げに強＜、ＩＣチップの設置場所にも
制約を受けず、また、配線を簡単に精度よく行なうこと
のできる構造のＩＣカードと、その製造方法を提供する
ことを目的とするものである。(Objective) An object of the present invention is to provide an IC card having a structure that is resistant to bending, is not restricted by the installation location of an IC chip, and allows easy and accurate wiring, and a method for manufacturing the same. This is the purpose.
（構成）
本発明のＩＣカードでは、機械的強度の大きい金属板に
孔が開けられてＩＣチップが樹脂により埋め込まれてお
り、そのＩＣチップを含む金属板上に絶縁膜を介して配
線用導体パターンが形成されている。(Structure) In the IC card of the present invention, a hole is made in a metal plate with high mechanical strength, an IC chip is embedded in resin, and a wiring conductor is placed on the metal plate containing the IC chip via an insulating film. A pattern is formed.
また、本発明の製造方法は、機械的強度の大きい金属板
に孔を開け、ＩＣチップを樹脂によりＩＣチップの表面
と前記金属板の表面とが同一平面にあるように埋め込み
、ＩＣチップ表面と前記金属板表面をリソグラフィが可
能な絶縁膜で被覆し、その絶縁膜にリソグラフィ技術を
用いて開孔部を形成し、少なくともＩＣチップａｆｆｉ
部分の前記絶縁膜上に金属薄膜を形成し、リソグラフィ
技術により前記金属薄膜をパターン化し前記ＩＣチップ
に配線を施す工程を備えている。In addition, the manufacturing method of the present invention involves making a hole in a metal plate having high mechanical strength, and embedding an IC chip in a resin so that the surface of the IC chip and the surface of the metal plate are on the same plane. The surface of the metal plate is covered with an insulating film capable of lithography, and openings are formed in the insulating film using lithography technology, so that at least the IC chip affi
The method includes a step of forming a metal thin film on a portion of the insulating film, patterning the metal thin film using lithography technology, and wiring the IC chip.
以下、実施例について具体的に説明する。Examples will be specifically described below.
第１図（Ｆ）は一実施例の断面図を表わす。FIG. 1(F) shows a cross-sectional view of one embodiment.
２は基板であり、機械的強度の大きい金属板としてステ
ンレス板が使用されている。基板２には孔４が開けられ
、その孔４にはＣＰＵやＥＰＲＯＭなどのＩＣチップ６
が樹脂８により埋め込まれている。樹脂８としては例え
ばアクリル樹脂を用いることができる。ＩＣチップ６は
パッドのある表面が基板２の表面と同一平面にあるよう
に埋め込まれている。2 is a substrate, and a stainless steel plate is used as a metal plate with high mechanical strength. A hole 4 is formed in the substrate 2, and an IC chip 6 such as a CPU or EPROM is inserted into the hole 4.
is embedded with resin 8. As the resin 8, for example, acrylic resin can be used. The IC chip 6 is embedded so that the surface with pads is on the same plane as the surface of the substrate 2.
ＩＣチップ６及び基板２上には層間絶縁膜としてポリイ
ミド樹脂膜１０が形成され、このポリイミド樹脂膜１０
上に配線としてアルミニウムの導体パターン１２が形成
されている。導体パターン１２はポリイミド樹脂ｖＡ１
０のコンタクトホールを経てＩＣチップ６のパッドに接
続されている。A polyimide resin film 10 is formed as an interlayer insulating film on the IC chip 6 and the substrate 2.
An aluminum conductor pattern 12 is formed thereon as wiring. The conductor pattern 12 is made of polyimide resin vA1
It is connected to the pad of the IC chip 6 through the contact hole 0.
導体パターン１２上にはガラスｆｆｉ （ＰＳＧ）
１４が被覆され、ガラス層１４上にはパッシベーション
膜１６が形成されている。パッシベーション膜１６及び
ガラス層１４には孔が開けられ、電極としてのバンプ１
８が形成されている。Glass ffi (PSG) is placed on the conductor pattern 12.
14 is coated, and a passivation film 16 is formed on the glass layer 14. A hole is made in the passivation film 16 and the glass layer 14, and a bump 1 as an electrode is formed.
8 is formed.
ＩＣチップ６からの熱を放熱するために、ＩＣチップ６
を充填している樹脂８に小さな孔をあけておいてもよい
。In order to dissipate heat from the IC chip 6, the IC chip 6
A small hole may be made in the resin 8 filled with.
第２図には同実施例におけるＩＣチップ６、電極１８及
び配線１２の配置を示す、２３はカード開孔部である。FIG. 2 shows the arrangement of the IC chip 6, electrodes 18, and wiring 12 in the same embodiment, and 23 is a card opening.
本実施例の製造方法を第１１１（Ａ）ないし同図（Ｆ）
により説明する。The manufacturing method of this example is shown in Figs. 111(A) to 111(F).
This is explained by:
（Ａ）ステンレスの基板２に孔４をあけ、アクリル樹脂
８によりＩＣチップ６を埋め込む、ＩＣチップ６のパッ
ド９のある表面と基板２の表面が同一平面内にあるよう
に、ＩＣチップ６を埋め込むが、このような埋込み方法
としては、孔４をあけた基板２の表面に接着剤により樹
脂フィルムを接着し、孔４にＩＣチップ６を入れ、ＩＣ
チップ６の表面（パッドのある面）を上記の接着剤に接
着させる。(A) Drill a hole 4 in a stainless steel substrate 2 and embed an IC chip 6 with acrylic resin 8. Place the IC chip 6 so that the surface with the pads 9 of the IC chip 6 and the surface of the substrate 2 are in the same plane. This embedding method involves bonding a resin film with adhesive to the surface of the substrate 2 with holes 4, inserting the IC chip 6 into the hole 4, and inserting the IC chip into the hole 4.
The surface of the chip 6 (the surface with the pads) is adhered to the above adhesive.
孔４にアクリル樹脂８を充填してＩＣチップ６を埋め込
んだ後１表面の樹脂フィルムと接着剤を全面エツチング
により除去したり、剥離すればよい。After filling the hole 4 with acrylic resin 8 and embedding the IC chip 6, the resin film and adhesive on one surface may be removed by etching the entire surface or peeled off.
（Ｂ）ＩＣチップ６の表面を含む基板２の表面にスピン
コード法によりポリイミド樹脂層ｌＯを形成する。ＩＣ
チップ６のパッド上のポリイミド樹脂層ｌＯにフォトリ
ソグラフィ法によりコンタクトホール１１をあける。(B) A polyimide resin layer IO is formed on the surface of the substrate 2 including the surface of the IC chip 6 by a spin code method. IC
A contact hole 11 is made in the polyimide resin layer IO on the pad of the chip 6 by photolithography.
（Ｃ）ポリイミド樹脂Ｊ！２１０の全面上にアルミニウ
ム１１１１２を蒸着法により形成する。(C) Polyimide resin J! Aluminum 11112 is formed on the entire surface of 210 by a vapor deposition method.
（Ｄ）アルミニウム膜１２上にフォトレジスト２０を塗
布し、露光、現像を行ない、そのフォトレジスト２０の
パターンをマスクとしてアルミニウム膜１２をエツチン
グし、パターン化して配線を形成する。このアルミニウ
ム配線１２はポリイミド樹脂層１０のコンタクトホール
を通してＩＣチップ６のパッドと接続する。(D) A photoresist 20 is applied onto the aluminum film 12, exposed and developed, and the aluminum film 12 is etched using the pattern of the photoresist 20 as a mask to form a pattern and form wiring. This aluminum wiring 12 is connected to a pad of the IC chip 6 through a contact hole in the polyimide resin layer 10.
（Ｅ）アルミニウム配線１２を含む表面上にＰＳＧガラ
ス層１４を形成し、そのＰＳＧガラス層１層上４上ォト
レジスト２２を塗布する。そしてフォトレジスト２２を
露光、現像してパターン化した後、ＰＳＧガラス層１層
上４極用のコンタクトホール２４をあける。(E) A PSG glass layer 14 is formed on the surface including the aluminum wiring 12, and a photoresist 22 is applied on the first layer 4 of the PSG glass layer. After the photoresist 22 is patterned by exposure and development, contact holes 24 for four electrodes are opened on one PSG glass layer.
（Ｆ）ＰＳＧガラス層１層上４して金によりバンブ１８
を形成した後、パッシベーション膜１６を形成する。(F) Bump 18 with gold on 4 layers of PSG glass layer
After forming, a passivation film 16 is formed.
なお、表面を平坦にするために、パッシベーシミン１ｌ
Ｑ１６を形成した後、切削してもよい。In addition, in order to make the surface flat, apply 1 liter of passibasimin.
After forming Q16, it may be cut.
また、アルミニウム膜１２を形成する領域は、ＩＣチッ
プ６と電極（バンブ）１８の間の配線領域に限定しても
よい、配線材料としては、アルミニウムの他、アルミニ
ウム合金、銅、クロム又は金などの導体を使用すること
ができる。Further, the area where the aluminum film 12 is formed may be limited to the wiring area between the IC chip 6 and the electrode (bump) 18. In addition to aluminum, the wiring material may include aluminum alloy, copper, chromium, or gold. conductors can be used.
第３図（Ａ）及び同図（Ｂ）は他の製造方法を表わすも
のである。FIGS. 3(A) and 3(B) show another manufacturing method.
（Ａ）ステンレスの基板２上にＩＣチップ６を埋め込む
ための孔４と、プリント基板２６を埋め込むための凹所
２５を予め形成しておく、ＩＣチップ６は第１図の実施
例と同様にして孔４に樹脂８により埋め込む、一方、プ
リント基板２６に予め電極となるバンブ２８を形成して
おき、そのプリント基板２６を基板２の凹所２５に樹脂
により埋め込む。(A) A hole 4 for embedding an IC chip 6 and a recess 25 for embedding a printed circuit board 26 are formed in advance on a stainless steel substrate 2, and the IC chip 6 is prepared in the same manner as in the embodiment shown in FIG. On the other hand, a bump 28 serving as an electrode is previously formed on the printed board 26, and the printed board 26 is embedded in the recess 25 of the board 2 with resin.
（Ｂ）その後、ポリイミドｆｆ１ｏを形成し、ＩＣチッ
プ６のバッド９上にコンタクトホールをあけた後、アル
ミニウム膜１２を形成し、パターン化して配線を形成す
る。その後、パッシベーション膜１６を形成する。(B) After that, polyimide ff1o is formed, a contact hole is made on the pad 9 of the IC chip 6, and then an aluminum film 12 is formed and patterned to form wiring. After that, a passivation film 16 is formed.
第４図には第３図の方法で製造されるＩＣカードにおけ
るＩＣチップ６、プリント基板２６、配線１２の配置を
示す。FIG. 4 shows the arrangement of the IC chip 6, printed circuit board 26, and wiring 12 in an IC card manufactured by the method shown in FIG.
第５図は電極を形成する他の方法を表わしたものである
。基板２上にアルミニウム膜１２により配線を施こし、
一方、被覆用シート３０に電極用金属タブレット３２を
埋め込んでおく、そして、電極用金属タブレット３２と
電極配線１２とが、一致するように、被覆用シート３０
を基板２上に接着する。FIG. 5 depicts another method of forming electrodes. Wiring is provided on the substrate 2 using an aluminum film 12,
On the other hand, the metal tablet 32 for electrode is embedded in the sheet 30 for covering, and the metal tablet 32 for electrode 32 and the electrode wiring 12 are aligned with each other in the sheet 30 for covering.
is adhered onto the substrate 2.
第６図はさらに他の実施例のＩＣカードを表わす。FIG. 6 shows an IC card of still another embodiment.
ステンレス製の基板２の孔４にＩＣチップ６が樹脂８に
よって埋め込まれ、基板２の表面とＩＣチップ６の表面
が同一面内にあるようにされ、両表面間に眉間絶縁膜で
あるポリイミド樹脂膜１０のコンタクトホールを介して
アルミニウム配線１２が形成されている。The IC chip 6 is embedded in the hole 4 of the stainless steel substrate 2 with resin 8, so that the surface of the substrate 2 and the surface of the IC chip 6 are in the same plane, and a polyimide resin which is an insulating film between the eyebrows is placed between both surfaces. Aluminum wiring 12 is formed through the contact hole in film 10.
配線１２の上からパッシベーション膜としてポリイミド
樹脂膜３４が形成されている。ポリイミド樹脂膜３４中
には、少なくともＩＣチップ６の存在する領域に静電破
壊防止用フィルム３６として、例えばアルミニウム箔が
埋設されている。A polyimide resin film 34 is formed as a passivation film over the wiring 12. In the polyimide resin film 34, for example, an aluminum foil is embedded as an electrostatic damage prevention film 36 at least in the area where the IC chip 6 is present.
静電破壊防止用フィルム３６を埋設する本実施例では、
基板２にＩＣチップ６を埋め込むには、第６図のように
基板２に孔４をあけて埋め込む場合だけでなく、従来の
ように金Ｒ製又は樹脂製の基板に凹部を設け、その凹部
にＩＣチップ６を嵌め込むようにしてもよい。In this embodiment, the electrostatic damage prevention film 36 is buried.
In order to embed the IC chip 6 in the substrate 2, it is not only necessary to drill a hole 4 in the substrate 2 as shown in FIG. The IC chip 6 may be fitted into the holder.
第６図の実施例によれば、ＩＣチップ６が静電破壊を起
こすのを有効に防止することができる。According to the embodiment shown in FIG. 6, electrostatic damage to the IC chip 6 can be effectively prevented.
（効果）
本発明のＩＣカードは、基板としてステンレス板などの
機械的強度の大きい金属板を使用し、ＩＣチップを基板
に埋め込んだ後、蒸着法などにより配線を形成するよう
にしたので、折り曲げに対して強いＩＣカードを達成す
ることができ、しかもＩＣチップの配設場所についても
制約を受けない効果がある。(Effects) The IC card of the present invention uses a metal plate with high mechanical strength such as a stainless steel plate as the substrate, and after embedding the IC chip in the substrate, the wiring is formed by vapor deposition, etc. It is possible to achieve an IC card that is strong against the above, and there is also an effect that there are no restrictions on the placement location of the IC chip.
第１図（Ａ）ないし同図（Ｆ）は一実施例を工程順に示
す断面図、第２図は一実施例のＩＣカードの要部の配置
を示す平面図、第３図（Ａ）及び同図（Ｂ）は他の製造
方法を工程順に示す断面図、第４図は第３図の実施例で
製作されるＩＣカードの要部の配置を示す平面図、第５
図はさらに他の製造方法を示す断面図である。第６図は
さらに他の実施例のＩＣカードを示す要部断面図である
。
２・・・・・・基板、
４・・・・・・孔、
６・・・・・・ＩＣチップ、
１０・・・・・・ポリイミド樹脂膜、
１２・・・・・・アルミニウム配線、
１８・・・・・・バンプ。1(A) to 1(F) are cross-sectional views showing one embodiment in the order of steps, FIG. 2 is a plan view showing the arrangement of the main parts of an IC card of one embodiment, and FIG. 3(A) and FIG. FIG. 4 is a plan view showing the arrangement of the main parts of the IC card manufactured in the embodiment shown in FIG. 3, and FIG.
The figure is a sectional view showing still another manufacturing method. FIG. 6 is a sectional view of a main part showing an IC card of still another embodiment. 2... Substrate, 4... Hole, 6... IC chip, 10... Polyimide resin film, 12... Aluminum wiring, 18 ······bump.
Claims (2)
チップが樹脂により埋め込まれており、前記ＩＣチップ
を含む金属板上に絶縁膜を介して配線用導体パターンが
形成されているＩＣカード。(1) IC with holes drilled in a metal plate with high mechanical strength
An IC card in which a chip is embedded in a resin, and a wiring conductor pattern is formed on a metal plate containing the IC chip via an insulating film.
プを樹脂によりＩＣチップの表面と前記金属板の表面と
が同一平面にあるように埋め込み、ＩＣチップ表面と前
記金属板表面をリソグラフィが可能な絶縁膜で被覆し、
前記絶縁膜にリソグラフィ技術を用いて開孔部を形成し
、少なくともＩＣチップ設置部分の前記絶縁膜上に金属
薄膜を形成し、リソグラフィ技術により前記金属薄膜を
パターン化し前記ＩＣチップに配線を施す工程を備えた
ＩＣカードの製造方法。(2) Drill a hole in a metal plate with high mechanical strength, embed an IC chip in resin so that the surface of the IC chip and the surface of the metal plate are on the same plane, and lithography the surface of the IC chip and the surface of the metal plate. coated with an insulating film that allows
forming an opening in the insulating film using lithography technology, forming a metal thin film on the insulating film at least in the IC chip installation area, patterning the metal thin film using lithography technology and providing wiring to the IC chip; A method for manufacturing an IC card.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11994286 | 1986-05-23 | ||
| JP61-119942 | 1986-05-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6399995A true JPS6399995A (en) | 1988-05-02 |
Family
ID=14773987
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61254139A Pending JPS6399995A (en) | 1986-05-23 | 1986-10-24 | Ic card and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6399995A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01299094A (en) * | 1988-05-28 | 1989-12-01 | Ibiden Co Ltd | Ic card |
| JP2020533680A (en) * | 2017-09-07 | 2020-11-19 | コンポセキュア，リミティド ライアビリティ カンパニー | Trading cards and manufacturing processes with embedded electronic components |
| US11461608B2 (en) | 2016-07-27 | 2022-10-04 | Composecure, Llc | RFID device |
| US11669708B2 (en) | 2017-09-07 | 2023-06-06 | Composecure, Llc | Metal, ceramic, or ceramic-coated transaction card with window or window pattern and optional backlighting |
| US11710024B2 (en) | 2018-01-30 | 2023-07-25 | Composecure, Llc | Di capacitive embedded metal card |
-
1986
- 1986-10-24 JP JP61254139A patent/JPS6399995A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01299094A (en) * | 1988-05-28 | 1989-12-01 | Ibiden Co Ltd | Ic card |
| US11461608B2 (en) | 2016-07-27 | 2022-10-04 | Composecure, Llc | RFID device |
| US11829826B2 (en) | 2016-07-27 | 2023-11-28 | Composecure, Llc | RFID device |
| JP2020533680A (en) * | 2017-09-07 | 2020-11-19 | コンポセキュア，リミティド ライアビリティ カンパニー | Trading cards and manufacturing processes with embedded electronic components |
| US11501128B2 (en) | 2017-09-07 | 2022-11-15 | Composecure, Llc | Transaction card with embedded electronic components and process for manufacture |
| US11669708B2 (en) | 2017-09-07 | 2023-06-06 | Composecure, Llc | Metal, ceramic, or ceramic-coated transaction card with window or window pattern and optional backlighting |
| US11710024B2 (en) | 2018-01-30 | 2023-07-25 | Composecure, Llc | Di capacitive embedded metal card |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8230588B2 (en) | Method of making an electronic device and electronic device substrate | |
| US5048179A (en) | IC chip mounting method | |
| JP2842378B2 (en) | High-density mounting structure for electronic circuit boards | |
| KR950012658B1 (en) | Semiconductor chip mounting method and substrate structure | |
| US5200362A (en) | Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film | |
| JP3069010B2 (en) | Multi-chip module with interconnect decals manufactured on mandrel | |
| EP0145862B1 (en) | Metallization of a ceramic substrate | |
| EP1827067B1 (en) | Method of forming a circuit substrate | |
| JPH1140522A (en) | Semiconductor wafer and manufacture thereof, semiconductor chip and manufacture thereof, and ic card with the semiconductor chip | |
| JPS6399995A (en) | Ic card and manufacture thereof | |
| JP2005093867A (en) | Semiconductor device and method of manufacturing same | |
| KR20010106096A (en) | Structure for mounting semiconductor device on liquid crystal display, and semiconductor device | |
| US20090166892A1 (en) | Circuit board for semiconductor package having a reduced thickness, method for manufacturing the same, and semiconductor package having the same | |
| US6784528B2 (en) | Semiconductor device with plating wiring connecting IC electrode pad to terminal | |
| KR20020065705A (en) | Tape circuit substrate and manufacturing method thereof and semiconductor chip package using thereof | |
| JP3482121B2 (en) | Semiconductor device | |
| JPS6359535B2 (en) | ||
| JPS6394646A (en) | Electronic device | |
| JPH0520901B2 (en) | ||
| US6580168B2 (en) | Method for manufacturing a low-profile semiconductor device | |
| JPS62276839A (en) | Tape carrier device | |
| JP2521417B2 (en) | Electroforming method | |
| JPH04314382A (en) | Manufacture of wiring board | |
| CN117202474A (en) | Circuit board, display device using same and manufacturing method of display device | |
| JP4137295B2 (en) | CSP tape carrier manufacturing method |