JPS6396777A - Pll circuit - Google Patents

Abstract

PURPOSE:To stably lead in a PLL by permitting a lead-in means to compare an output from a low-pass filter with an output from a detection circuit and feeding back a comparison error signal to the low-pass filter. CONSTITUTION:A lead-in voltage Vp varying according to the fluctuation of the rotational frequency of a drum is generated from a lead-in voltage generator circuit 13 at the time of quick search, and the voltage is compared with a voltage outputted from the low-pass filter 8, that is, a VCO control voltage Vc. If it is higher than the lead-in voltage Vp, an error current, for instance, is allowed to flow into a capacitor 8a in the low-pass filter 8 from the lead-in circuit 13, and the voltage outputted from the low-pass filter is dropped. If the control voltage Vc is lower than the lead-in voltage Vp, the lead-in circuit 13 sucks a current discharged from the capacitor 8a in the low-pass filter 8 to drop its output voltage. Thus the lead-in action of the PLL circuit can be stabilized.

Description

[Detailed description of the invention] The invention will be explained in the following order.

A. Field of industrial application B. Overview of the invention C. Prior art D. Problem to be solved by the invention E. Means for solving the problem (Fig. 1) F. Effect G. Overall structure and operation of embodiment G1 (Fig. 1) Figures 1 and 2) Structure of G2 key mechanism (Figure 3) Operation of G3 key mechanism (Figure 4r:i!J and Figure 5) G4 non-trunking method (Figure 6) Effect of invention A Industrial FIELD OF THE INVENTION The present invention relates to a PLL circuit suitable for use in a clock extraction circuit or the like which extracts data by extracting a clock from information transmitted in bursts.

B. Summary of the Invention The present invention provides a P-type circuit including at least an integral type low-pass filter suitable for use in a clock extraction circuit, etc., which extracts a clock from information transmitted in bursts and extracts data.
In the LL circuit, a drawing means and a detection means for detecting rotation of the drum are provided on the output side of the low-pass filter,
By comparing the output of the low-pass filter and the output of the detection means with the pull-in means and feeding back the comparison error signal to the low-pass filter, stable PLL lock operation is achieved in all speed ranges during high-speed search, and pseudo-locking is achieved. Enables stable retraction even with tape, etc. that is easily susceptible to
Moreover, even if the drum rotation speed fluctuates considerably, the PLL
It is designed to be able to draw in stably.

C. Conventional technology As a burst information transmission system, for example, a plurality of rotating heads are arranged around a tape guide drum at equal angular intervals, that is, 180 degrees, and a magnetic tape is moved between the tape guide drum and the magnetic tape. A recording/reproducing device is conceivable that is wrapped over a narrower angular range of eg 90 degrees around its 180 degree angular range.

In such a recording/reproducing apparatus, the RF multiplied signal obtained by being reproduced by the rotary head during normal reproduction has a burst-like signal waveform whose signal level increases only during the period when the rotary head is approximately in contact with the tape. Such an RF waveform is waveform-equalized, further waveform-shaped, and then supplied to the PLL circuit.

When the level of the RF waveform is sufficiently large, the PLL circuit
Although it locks and is in a stable state, when the RF multiplier signal level is very small (substantially no signal), it does not lock and enters a free-run state, and the PLL circuit runs free (voltage controlled oscillator (hereinafter referred to as voltage controlled oscillator) , VoC) runs free), the oscillation frequency of the VCO changes to near the free running frequency, and this unstable state is allowed until the regular RF multiplied signal comes in again.

This applies to fast forward (FF) searches and rewinding.
) The same thing can be said during high-speed playback such as search. In other words, during high-speed playback, multiple rotating heads cross multiple trunks in one scan, and at this time, the output of each head is obtained from the trunk whose azimuth matches, and output from the track whose azimuth does not match. Therefore, an RF multiplied signal similar to a so-called solo bread ball is obtained.

Therefore, such RF multiplied signal is substantially supplied to PL
In the L circuit, where the RF multiplied signal level is sufficiently large,
Although it locks and becomes stable, there is virtually no RF multiplied signal, or it does not lock in the troughs of the RF waveform of the solo bread ball, resulting in a free running state and an unstable state.

However, as mentioned above, <RF times the signal level becomes smaller,
In the case of a conventional device in which the VCO becomes unlocked and enters a free-running state, and the VCO changes to near the free-running frequency, there are various drawbacks as described below.

First, the capture range (the oscillation frequency range of the VCO that can lock to the input signal when the PLL is initially not locked) cannot be widened. Even if the capture range can be widened, the pull-in time (time to pull in) will be longer, and the lock range (if the input signal is changed while the PLL is initially locked, the signal and lock state may be changed). The oscillation frequency range of the VCO that can be maintained is not actually that wide, and at present it is at most ±2 to 3
It is about %. In addition, it is necessary to adjust the free-running frequency, and the recovery time (time from lock loss to lock lock) from RF double signal dropout is short (but the PLL remains locked for a long time). There are inconveniences such as storage.

Therefore, the present inventor has proposed a clock extraction circuit that can eliminate the above-mentioned drawbacks (Japanese Patent Application No. 85863/1986).
.

However, in the case of a circuit such as that disclosed in Japanese Patent Application No. 60-85863, noise tends to be mixed in and the pull-in characteristic at off-track tends to become unstable. In other words, if noise enters the middle of the RF waveform, the VCO control voltage will change in response, and even when the next true RF waveform arrives, the PLL circuit will not lock and may be out of lock. there were.

Furthermore, during a high-speed search, the pull-in ability of the PLL circuit is reduced due to the difference in effective relative speed caused by the difference in azimuth angle between the positive azimuth and negative azimuth heads. This is because the difference in effective relative speed causes a difference in data and carrier frequencies between the two heads, and as a result, the capture range appears to be reduced.

Therefore, the inventor of the present invention has improved the pull-in characteristics at the time of noise intrusion and offset, which tended to become unstable, and has enabled stable operation even when the effective relative speed is created due to the azimuth angle difference during high-speed search, and is faster than ±300 times faster. Furthermore, we proposed a PLL circuit that can realize high-speed calling (Japanese Patent Application No. 1251/1986).
No. 30).

D. Problems to be Solved by the Invention In this way, a high-speed search of ±300 times or more can be realized, but it has been found that the following disadvantages occur.

For example, if a high-speed search is performed using an overridden tape that has been distorted during recording or the erasure rate cannot be maintained, or a tape that has a fixed pattern (2T) recorded at 1.5 times the trunk pitch, the PLL will lock. This means that a phenomenon occurs in which the lock becomes largely deviated (pseudo-lock).

This is because the pull-in voltage Vp given to the pull-in circuit shown in Japanese Patent Application No. 125130/1983 is actually fixed at a voltage value that allows stable pull-in even when the speed is about 300 times higher in both FF search and REW search. This is because, on the contrary, in areas where the search speed is slow, false locks or the like or lock loss occasionally occur.

In addition, when this circuit is applied to a so-called non-tracking method, it is practical to some extent even if the current method in which the pull-in voltage during normal playback is fixed is used as is, but in the non-tracking method, the drum rotation speed is Mechanism 1
When operated by a motor, etc., it moves by 5 to 10%, which means that the carrier component of the reproduced data also moves by that much, so similar to the above-mentioned high-speed search, false locks are expected to occur, and PLL that focuses only on response characteristics The deterioration of the random error rate when created is also a problem.

This invention was made in view of these points, and it realizes stable PLL locking operation in all speed ranges during high-speed search, and enables stable pull-in even with tapes that are prone to pseudo-locking. Also, the number of rotations of the drum is 5~
The present invention provides a PLL circuit that can stably draw in the PLL even if the PLL operates with considerable fluctuation of 10%.

E. Means for Solving the Problems The PLL circuit according to the present invention includes at least an integral type low-pass filter (8), and includes a drawing means (13, 14) on the output side of the low-pass filter;
Detection means (15, 16) for detecting rotation of the drum are provided, the drawing means compares the output of the low-pass filter with the output of the detection means, and a comparison error signal is fed back to the low-pass filter. ing.

F action A pull-in circuit (13) as a pull-in means and a pull-in voltage generation circuit (1) are connected to the output side of the low-pass filter (8).
4), a drum rotation speed detection circuit (15) as a detection means, and a D/A converter (6) are provided, and fluctuations in the drum rotation speed are detected by the pull-in voltage generation circuit (13) during high-speed search. The pull-in voltage Vp changes according to
is generated and compared with the output voltage of the low-pass filter (8), that is, the VCO control voltage Vc, and when the control voltage Vc is higher than the pull-in voltage Vp, the pull-in circuit (13) supplies, for example, an error current to the capacitor of the low-pass filter (8). When the control voltage Vc is lower than the pull-in voltage Vp, the error current, that is, the discharge current from the capacitor of the low-pass filter (8) is sucked into the pull-in circuit (13) to reduce the output voltage of the low-pass filter (8). By increasing the output voltage, it is possible to stabilize the pull-in operation of the PLL circuit, shorten the pull-in time, and realize ultra-high-speed search, as well as to ensure stable PLL operation in the entire speed range during high-speed search. This made it possible.

G. Example Hereinafter, an example of the present invention will be described in detail based on FIGS. 1 to 6.

Overall configuration and operation of G1 Figure 1 shows the circuit configuration of this embodiment. In the figure, (1) is a rotating head of which only one is representatively shown. The system actually consists of a plurality of rotating heads (not shown) attached at angular intervals of 180 degrees around the periphery of the tape guide drum, and the output is taken out by being alternately switched by a switch pulse. There is.

Further, although not shown, a magnetic tape is wound around the tape guide drum over an angular range of, for example, 90 degrees.

The reproduced signal (RF multiplied signal) read from a recording medium such as a tape by a rotating head (1) is amplified by an amplifier (2) and then supplied to a waveform equalization circuit (3) where the waveform is equalized. The output from the waveform equalization circuit (3) is supplied to the waveform shaping circuit (4), where the waveform is shaped and then supplied to the PLL circuit (5).The PLL circuit (5) performs phase comparison and data extraction. circuit (6), charge pump circuit (7)
), fully integrated low-pass filter (8) and V CO
(91), and the output of VCO (91 is fed back to the phase comparison and data extraction circuit (6) to form a feedback system. In this PLL circuit (5), the clock is extracted and regenerated, and Data is extracted and played back.

A high-speed envelope detection circuit (
10), where the envelope of the reproduced signal (RF multiplied signal) is double-wave rectified at high speed and converted into an envelope waveform. The detection output of the envelope detection circuit (10) is supplied to the tracking comparator (11). Here, it is compared with an automatically variable threshold level according to the envelope waveform, and the point of drop in the video signal is detected.

The output of the tracking comparator (11) is supplied to a random walk filter (12), where unstable parts (flapping) existing at the side edges of the output waveform of the tracking comparator (11) are removed. In other words, the tracking comparator (11) and the random walk filter (12) function as a type of waveform shaping means for shaping the envelope waveform. Random walk filter (
12) has vc.

A clock having a frequency obtained by dividing the oscillation frequency of (9) by a predetermined frequency division ratio is supplied, and as a result, the speed of state transition changes depending on the phase comparison frequency, and a normal fixed clock is used. The amount of wasted time is further reduced compared to the previous version.

The output of the random walk filter (12) is supplied to the charge pump circuit (7) as a control signal for controlling its charge pump operation. That is, if the control signal is at a high level, for example, the charge pump operation is performed, that is, the feedback loop is closed and a lock state is established, and when the control signal is at a low level, the charge pump operation is stopped, that is, the feedback loop is opened and a hold state is established. .

In addition, the envelope detection circuit (10), ) ranking comparator (11) and random walk filter (
12) constitutes a feedforward system.

Further, a pull-in circuit (13) is provided on the output side of the complete integral low-pass filter (8), and the output of the low-pass filter (8), that is, the VCO control voltage Vc, is supplied to one input side of the pull-in circuit (13). Also, the retraction circuit (1
3) has a pull-in voltage generation circuit (14) on the other input side.
A pull-in voltage Vp is supplied from the terminal.

The pull-in circuit (13) has a control voltage Vc and a pull-in voltage V.
p, and the comparison error voltage is converted into a current and fed back to the low-pass filter (8).

In the pull-in circuit (13), the control voltage Vc is the pull-in voltage V
When it is higher than p, the comparison error voltage is converted into a current, and this current is passed through a low-pass filter (
8) to charge it, and as a result, the polarity of the capacitor (8a) changes as shown in the figure, so the output of the differential amplifier (8b), that is, the control voltage Ve.
becomes lower. This operation continues until the control voltage Vc becomes equal to the pull-in voltage Vp, and finally the control voltage Vc becomes equal to the pull-in voltage Vp, and as a result,
The control voltage Vc of C0(9) is set to a voltage at which the PLL circuit is likely to lock.

In addition, when the control voltage Vc is lower than the pull-in voltage Vp, the pull-in circuit (13) converts the comparison error voltage into a current, and directs the corresponding current to the capacitor of the low-pass filter (8) in the direction shown by the solid line. (8a), and as a result, the polarity of the capacitor (8a) changes as shown in the figure, so that the output of the differential amplifier (8b), that is, the control voltage Vc, becomes high. This operation causes the control voltage V
This continues until c becomes equal to the pull-in voltage Vp, and finally the control voltage Vc becomes equal to the pull-in voltage Vp, whereby the control voltage Vc of VCO (91) is set to a voltage at which the PLL circuit is likely to lock.

In this way, the low-pass filter (8) is a completely integral type, and since no feedback is applied to the DC component, the low-pass filter (8) is connected to the pull-in circuit (13).
) is applied DC feedback to the amplifier (8b). By doing this, it is possible to avoid problems such as loss of lock due to duty abnormality of input data, loss of lock due to the eye pattern of input data not being open, etc., which were the decisive drawbacks of conventional fully integral type filters. . Especially when there is a large missing part of the RF waveform, such as during variable speed playback or after-recording, V
It is good because CO (91) can oscillate.

Now, in this embodiment, a drum rotation speed detection circuit (15
) and a D/A converter (16) for converting the output of the detection circuit (15) from a digital signal to an analog signal. In other words, these drum rotation speed detection circuits (15) and D
The /A converter (16) works as a kind of frequency-voltage conversion circuit.

Then, the output of the D/A converter (16) is supplied to the pull-in voltage generation circuit (14). That is, when the rotational speed of the drum changes, its pull-in voltage Vp also changes. For example, F
In the F search, the drum rotation speed increases as the search speed increases, so as the drum rotation speed increases, the pull-in voltage Vρ for the A head increases and the pull-in voltage Vp for the B head decreases. On the other hand, in the REW search, as the search speed increases, the rotational speed of the drum decreases, so as the rotational speed of the drum decreases, the pull-in voltage Vp for the A head decreases and the pull-in voltage Vp for the B head increases.

Normally, when the oscillation frequency of V CO (Q!) is higher than the frequency of the clock component included in the reproduced RF multiplied signal, the gain in the phase comparison stage decreases and the phase comparison ability deteriorates.
In this embodiment, as an example, the control voltage Vc from the low-pass filter (8) is pulled in only in the case of the B head in the FF search in which the frequency of the clock component included in the reproduced RF multiplied signal is lower, and in the case of the A head in the REW search. The pull-in voltage Vp is lowered by a predetermined amount according to fluctuations in the rotational speed of the drum so as to match the voltage Vp. The pull-in voltage Vp is increased by a predetermined amount in response to fluctuations in the drum rotation speed so that the control voltage Vc for the A head during the FF search and for the B head during the REW search matches the pull-in voltage Vp. You can.

In other words, the pull-in voltage generation circuit (14) generates a constant pull-in voltage Vp during normal playback, but during high-speed search, the output of the D/A converter (16) is FF as the pull-in voltage Vp depending on the fluctuation of the drum rotation speed. It occurs in relation to the B head during a search, and in relation to the A to throat during a REW search.

Figure 2 shows the case of fast search (FF).
The RF waveform obtained by scanning the head and the B head has a so-called abacus bead shape as shown in FIG. 2A. At this time, the control voltage Vc applied from the low-pass filter (8) to VCOf9) differs depending on the head, as shown in FIG. 2B. This means that the fast forward (FF) side and the winding (R
When searching on the BW side, there is a difference in the effective relative speeds of heads with two different azimuths, and the faster the search speed is, the larger the difference becomes.In other words, the RF multiplied signal carrier reproduced by the two heads. This means that there is a difference in the frequency (the clock frequency that should be extracted).

Therefore, the pull-in voltage Vp generated by the pull-in voltage generation circuit (14) is controlled according to the fluctuation of the rotational speed of the drum, and the pull-in voltage Vp is set for each head so that the PLL circuit can easily pull in the pull-in voltage Vp as shown in FIG. 2C. I'll control it. In other words, the control voltage Vc from the low-pass filter (8) is
It is made to match the pull-in voltage Vp as shown in Figure C. In other words, the drum rotation speed increases as the tape runs faster during FF search, so lower the pull-in voltage Vp of the B head as shown in Figure 2C, and reduce the pull-in voltage Vp when the drum rotation speed becomes slower. I wish I could raise it (,
On the other hand, during the REW search, the faster the tape runs, the lower the drum rotation speed will be, so the pull-in voltage Vp of the A head can be lowered accordingly, and when the drum rotation speed becomes slower, the pull-in voltage Vp can be increased. At this time, if nothing is done, the lock will be lost or a false lock will occur, but as described above (by making the control voltage Vc match the pull-in voltage Vp, the lock will be properly applied for both RF waveforms). .

Structure of G2 Main Part FIG. 3 shows an example of a specific circuit structure of the main part of the present invention. In FIG. 3, parts corresponding to those in FIG. 1 are designated by the same reference numerals. The pull-in voltage generation circuit (14) has a plurality of control input terminals (14a) to (14d),
For example, a high level signal is supplied to the input terminal (14a) from a drum servo circuit (not shown) in the fast forward (FF) mode, a low level signal is supplied in the winding (REW) mode, and the input terminal (14b) is supplied with a high level signal in the fast forward (FF) mode and a low level signal in the winding (REW) mode. A from the drum servo circuit
A high level switching pulse is supplied to the input terminal (14) for the head and a high level for the B head.
c) is supplied with a low level signal in search mode and high level in normal playback mode from the drum servo circuit, and the input terminal (14d) is supplied with a low level signal when there is an RF multiplied signal from the drum servo circuit, and an RF multiplied signal. When not present, a high level signal is supplied.

(14e) is an analog switch circuit, which has input terminals XI, X2 and an output terminal and input terminal
is supplied with the output of the D/A converter (16) (FIG. 1). Further, the analog switch circuit (14e) has an inhibit terminal INH1 control terminals A and B, and the inhibit terminal INH is supplied with a signal from the control input terminal (14c), and when it is at a low level, the signal is sent to the analog switch circuit (14e). The switching operation is performed and the switching operation is stopped when the level is high. The control terminal A has a control input terminal (14a).

The signal from (14b) is connected to the exclusive OR circuit (1
4g), and the control terminal B is supplied with a signal from the control input terminal (14d). As will be described later, when the levels of control terminals A and B are the same, input terminal X2 is connected to output terminal X, and when the levels of control terminals A and B are different from each other, input terminal X1 is connected to output terminal X. connected to.

Further, the output terminal X of the analog switch circuit (14e) is connected to the inverting input terminal of the amplifier (13b) via the resistor (13a) of the pull-in circuit (13), and is grounded via the capacitor (13c). .

A resistor (13d) is connected between the inverting input terminal and the output terminal of the amplifier (13b), and resistors (13e) and (13f) are connected between the non-inverting input terminal and the output terminal. Further, the non-inverting input terminal of the amplifier (13b) is connected to the output side of the low-pass filter (8) via a resistor (13g). The common connection point of the resistors (13e) and (13f) is connected to the output side of the charge pump circuit (7) via the resistor (13h), and also connected to the output side of the charge pump circuit (7) via the resistor (13i).
) to the output side of the amplifier (17a) of the charge pump damper circuit (17). The charge pump damper circuit (17) suppresses unnecessary operation of the charge pump circuit (7) and shapes the waveform of the error voltage.
Please refer to No. 8.

Operation of the main part of G3 During normal playback, the signal supplied to the control input terminal (14c) becomes high level, and the analog switch circuit (14c) becomes high level.
The switching operation of 4e) is stopped, and the pull-in voltage generation circuit (
On the output side of 14), there is a variable resistor (14f) during normal playback.
) is generated. Therefore, as mentioned above, the pull-in circuit (13) uses the pull-in voltage Vp and the control voltage Vc from the low-pass filter (8).
is compared, and the error information is fed back to the low-pass filter (8) so that the control voltage Vc becomes equal to the pull-in voltage Vp.

During high-speed search, the signal supplied to the control input terminal (14c) becomes low level and the analog switch circuit (14e
) switching operation is started. The operation will be divided into FF search and REW search and will be explained with reference to FIGS. 4 and 5, respectively.

First, in the FF search, from the control input terminal (14b), the fourth
A switching pulse as shown in FIG. 4A is supplied, and a high level signal as shown in FIG. 4B is supplied to the control input terminal (14a). As a result, a signal as shown in FIG. 4C is obtained on the output side of the exclusive OR circuit (14g). Further, a signal as shown in the fourth diagram is supplied from the control input terminal (14d). Then, a switching signal as shown in FIG. 4 is internally obtained from the signals shown in FIG. 4C and D. In other words, the switching signal shown in FIG. 4E is at a high level when the signals shown in FIG. 4C and D are at the same level;
It is a low level signal when the levels are different.

When this switching signal is at a high level, the input terminal X2 and the output terminal
When the level is low, the input terminal X1 and the output terminal X are connected, and a constant pull-in voltage Vp similar to that during normal reproduction is supplied to the pull-in circuit (13). In other words, when the RF multiplied signal reproduced by the A head is input, a constant pull-in voltage Vp similar to that during normal playback is applied to the pull-in circuit (
13) and is reproduced by the B head, the output of the D/A converter (16), that is, the pull-in voltage Vp, which is lowered by a predetermined amount according to the fluctuation of the drum rotation speed, is applied to the pull-in circuit. (13).

Corresponding to FIG. 2, the following can be said. That is, during the period T1 during which the A head is scanning and the RF multiplied signal as shown in FIG. 2A is obtained, the output side of the pull-in voltage generation circuit (14) is as shown in FIG. 2C as during normal reproduction. A constant pull-in voltage Vp of A is obtained, and A
During a period T2 in which there is no RF multiplied signal between the head scanning period and the B head scanning period, the pull-in voltage Vp is lowered by a predetermined amount according to the fluctuation of the drum rotation speed, as shown in FIG. 2C.
was obtained, and during scanning with the B head, R as shown in Figure 2A was obtained.
In the period T3 in which the F-fold signal is obtained, as shown in FIG. During the period T4 during which scanning is not in progress, a constant pull-in voltage Vp, which is substantially the same as that during normal reproduction, is obtained as shown in FIG. 2C, similar to the above-mentioned period T1.

Next, in the REW search, a switching pulse as shown in FIG. 5A is supplied from the control input terminal (14b).
A low level signal as shown in FIG. 5B is supplied to the control input terminal (14a). As a result, a signal as shown in FIG. 5C is obtained on the output side of the exclusive OR circuit (14g). Further, a signal as shown in the fifth diagram is supplied from the control input terminal (14d). Then, a switching signal as shown in FIG. 5E is internally obtained from the signals shown in FIGS. 5C and 5D. That is, the switching signal shown in FIG. 5E is at a high level when the signals shown in FIG. 5C and D are at the same level, and is at a low level when the signals are at different levels.

When this switching signal is at a high level, the input terminal X2 and the output terminal
When the level is low, the input terminal X1 and the output terminal X are connected, and a constant pull-in voltage Vp similar to that during normal reproduction is supplied to the pull-in circuit (13). In other words, when the RF multiplied signal reproduced by the B head is input, a constant pull-in voltage Vp similar to that during normal playback is applied to the pull-in circuit (
13) and is reproduced by the A head, the output of the D/A converter (16), that is, the pull-in voltage Vp, which is lowered by a predetermined amount according to the fluctuation of the drum rotation speed, is applied to the pull-in circuit. (13).

In addition, in FIGS. 4 and 5, in FIG. 4, the switching signal rises early before the switch pulse goes to high level, and in FIG. 5, the switching signal rises early before the switching pulse goes to low level. The reason for this rise is to make the control voltage Vc from the low-pass filter (8) match the pull-in voltage Vp in advance to complete the pull-in before the RF multiplied signal is input.

The control voltage Vc from the low-pass filter (8) is pulled into the pull-in voltage Vp obtained in this way, and the control voltage Vc from the low-pass filter (8) is applied to the next stage VCof9), which is controlled to correspond to the pull-in voltage Vp as shown in FIG. 2C during FF search. A voltage Vc is supplied.

During FF search, the output side of the low-pass filter (8) is controlled as shown in Figure 2B in response to the RF multiplied signal shown in Figure 2A obtained by scanning with the A head and B head. Although the voltage Vc is obtained, it is directly converted to V CO
If it is supplied to (9), the PLL circuit will oscillate, so
This control voltage Vc is pulled in with a pull-in voltage Vp as shown in FIG. That's how I do it.

G4 Non-Tracking Method In the non-tracking method, the tape runs without a tracking servo, and the drum rotational speed fluctuates significantly. Even if the tape speed changes, even if it doubles, the frequency of the carrier in the reproduced data hardly changes. However, when the rotational speed of the drum changes, this results in a change in the carrier frequency. Therefore, in the non-tracking method, as described above, the drum rotation speed detection circuit (15) and the D/A
A converter (16) may be added. In other words, by changing the pull-in voltage during normal playback by changing the rotational speed of the drum, stable data extraction becomes possible. Figure 6 shows each waveform in the non-tracking system. Figure 6A shows the RF multiplied signal waveform during normal playback in the non-tracking system, and Figure 6B shows the output/A converter ( 16), the output waveform of FIG. 6C is the target value of the pull-in voltage Vp.

In other words, a major advantage of the present invention in applying the present invention to a non-tracking system is that it is possible to generate a voltage that easily locks the PLL from fluctuations in the rotational speed of the drum.

H Effects of the Invention As described above, according to the present invention, the drawing means and the detection means for detecting the rotation of the drum are provided on the output side of the low-pass filter of the PLL circuit, and the output of the low-pass filter, that is, V
The CO control voltage ■ is compared with a predetermined voltage that corresponds to fluctuations in drum rotational speed, that is, the pull-in voltage, and the comparison error signal is fed back to the low-pass filter to match the control voltage with the pull-in voltage, allowing for high-speed search. Stable PLL operation is possible in the entire speed range, and stable retraction is possible even with tapes that are prone to pseudo-locking.

In addition, even in the non-tracking method, the degree of change in the drum rotation speed during normal playback corresponds to a change in the frequency of the carrier component in the reproduced data, so if the drum rotation speed changes by a few percent, the pull-in voltage will change accordingly. By changing it, you can lock it stably, and even if the drum rotation speed fluctuates considerably, the PLL can be retracted stably.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention, FIG. 2 is a diagram for explaining the operation, FIG. 3 is a circuit configuration diagram of the main part of this invention, and FIGS. 4 and 5. 3 is a circuit configuration diagram for explaining the operation of FIG. 3, and FIG. 6 is a waveform diagram in a non-tracking system to which the present invention is applied. (7) is a charge pump circuit, (8) is a low-pass filter, (9) is a voltage controlled oscillator (VCO), (13) is a pull-in circuit, (14) is a pull-in voltage generation circuit, (1
5) is a drum rotation speed detection circuit, and (16) is a D/A converter.

Claims (1)

[Claims] In a PLL circuit including at least an integral type low-pass filter, a pull-in means and a detection means for detecting rotation of a drum are provided on the output side of the low-pass filter, and the pull-in means detects the output of the low-pass filter. and the output of the detection means, and a comparison error signal is fed back to the low-pass filter.