JPS639650U - - Google Patents
Info
- Publication number
- JPS639650U JPS639650U JP10198286U JP10198286U JPS639650U JP S639650 U JPS639650 U JP S639650U JP 10198286 U JP10198286 U JP 10198286U JP 10198286 U JP10198286 U JP 10198286U JP S639650 U JPS639650 U JP S639650U
- Authority
- JP
- Japan
- Prior art keywords
- register
- information
- lamp
- peripheral device
- factor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002093 peripheral effect Effects 0.000 claims description 8
- 230000005856 abnormality Effects 0.000 claims description 4
- 238000011084 recovery Methods 0.000 claims description 2
- 230000002159 abnormal effect Effects 0.000 claims 2
- 125000004122 cyclic group Chemical group 0.000 claims 1
- 238000001514 detection method Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012790 confirmation Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図は本発明の一実施例の計算機周辺機器異
常プログラム検出装置のブロツク図、第２図は計
算機周辺機器の異常時、検出装置を逐次的に動作
させる手順の流れ図、第３図は計算機周辺機器の
回復時ランプ消灯の為に検出装置を逐次的に動作
させる手順の流れ図である。
３……トラツプコードレジスタ、４……ＡＮＤ
回路、５……同期用パルス発信器、６……演算レ
ジスタ、９……周辺機器異常信号線、１０……周
辺機器回復信号線、１３……条件確定信号線、１
４……同期用タイミング信号線、１８……ランプ
点・消灯線、１９……ブザー鳴動線、２０……警
報ランプ、２１……警報ブザー。
FIG. 1 is a block diagram of a computer peripheral device abnormality program detection device according to an embodiment of the present invention, FIG. 2 is a flowchart of a procedure for sequentially operating the detection device when a computer peripheral device has an abnormality, and FIG. It is a flowchart of a procedure for sequentially operating a detection device to turn off a lamp when a peripheral device recovers. 3...Trap code register, 4...AND
Circuit, 5...Synchronization pulse oscillator, 6...Arithmetic register, 9...Peripheral device abnormality signal line, 10...Peripheral device recovery signal line, 13...Condition confirmation signal line, 1
4... Timing signal line for synchronization, 18... Lamp on/off line, 19... Buzzer ringing line, 20... Alarm lamp, 21... Alarm buzzer.
Claims (1)
異常情報又は回復情報をスタツクする入出力情報
スタツクレジスタとスタツクをサイクリツクに行
うサイクリツクコントロールレジスタとを有し、
異常信号コードに対し、プログラム検出すべきか
を判別するトラツプコードレジスタ、ＡＮＤ回路
及び機器ＮＯに対応した周辺機器ＮＯ対応警報情
報レジスタよりランプ点消灯要因を決定する演算
レジスタからランプ点消灯要因格納レジスタへ要
因がセツトされ、セツトと同時にランプ及びブザ
ー鳴動されるようになつていて、各レジスタの情
報授受は各信号線にて行われ同期は同期用パルス
発信器にて行うことを特徴とする計算機周辺機器
異常プログラム検出装置。 It has an input/output information stack register that stacks abnormality information or recovery information when issuing a program input/output macro to a peripheral device, and a cyclic control register that cyclically stacks the information.
A trap code register that determines whether a program should be detected for an abnormal signal code, an AND circuit, and an alarm information register corresponding to the peripheral device number corresponding to the device number, an arithmetic register that determines the lamp on/off factor, and a lamp on/off factor storage register. The computer is characterized in that a factor is set to the register, a lamp and a buzzer sound simultaneously with the setting, information is exchanged between each register through each signal line, and synchronization is performed by a synchronization pulse oscillator. Peripheral device abnormal program detection device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10198286U JPS639650U (en) | 1986-07-04 | 1986-07-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10198286U JPS639650U (en) | 1986-07-04 | 1986-07-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS639650U true JPS639650U (en) | 1988-01-22 |
Family
ID=30973214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10198286U Pending JPS639650U (en) | 1986-07-04 | 1986-07-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS639650U (en) |
-
1986
- 1986-07-04 JP JP10198286U patent/JPS639650U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS61158780U (en) | ||
| JPS63148893U (en) | ||
| JPS639650U (en) | ||
| JPH0266054U (en) | ||
| JPH0333333U (en) | ||
| JPH01117557U (en) | ||
| JPH03110516U (en) | ||
| JPS60166013U (en) | Abnormality detection circuit of stepping type control device | |
| JPS6438593U (en) | ||
| JPS6329682U (en) | ||
| JPS61158895U (en) | ||
| JPS63157639U (en) | ||
| JPH02143628U (en) | ||
| JPS6156592U (en) | ||
| JPS6232449U (en) | ||
| JPH0263145U (en) | ||
| JPS60143392U (en) | timer device | |
| JPS61133842U (en) | ||
| JPS60153355U (en) | Multi-CPU system control device | |
| JPS63188754U (en) | ||
| JPS61131690U (en) | ||
| JPS5988705U (en) | alarm circuit | |
| JPS61196346U (en) | ||
| JPS6327904U (en) | ||
| JPS62134150U (en) |