JPS639371A - Synchronizing signal correcting circuit at muting - Google Patents

Abstract

PURPOSE:To make character display in a stable state by connecting series circuits of a switching element and a capacitor successively between a signal line and grounding and connecting a constant voltage circuit to the middle point of connection of the switching element and the capacitor. CONSTITUTION:A series circuit 9 of a switching transistor 7 and a capacitor 8 is connected between a signal line and grounding. A muting circuit 11 is connected to the switching transistor 7 through a resistor 10. A constant voltage circuit 12 is connected to the middle point of connection of the switching transistor 7 and the capacitor 8. When a signal comes in from the muting circuit 11, video signals B are erased through the capacitor 8. The level of the signal line 6 is kept at the pedestal level C, and the depth of synchronizing signals A is constant irrespective of on/off of the switching transistor 7. Accordingly, when character display is made, the state of display is stable.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a synchronization signal correction circuit for muting when erasing images and displaying characters in a video device. There are two ways to display the text: one is to overlap the characters without erasing the image, and the other is to erase the image and display only the characters. In a television photo system in which still images are stored as electronic signals and displayed on a cathode ray tube, text is displayed in a muted state with the video erased in order to display various information in text.

In order to obtain such a function, a circuit as shown in FIG. 3 has conventionally been adopted. That is, a capacitor 2 and a switching transistor 3 are connected to ground with respect to the signal line 1, and a mute signal circuit 5 is connected to the switching transistor 3 via a resistor 4.

Therefore, normally, since the switching transistor 3 is off, the signal information placed on the signal line 1 is transmitted to a predetermined circuit, but when there is a mute signal, the signal line 1 is grounded via the capacitor 2. , cancel the signal component.

Problems to be Solved by the Invention In the conventional circuit shown in FIG. 3, when the switching transistor 3 is off, the video signal B is output based on the synchronization signal (SYNC) A as shown in FIG.
is being transmitted via signal line 1. At this time, the synchronizing signal A maintains a constant basic level C.

When a mute signal is generated in this state, the switching transistor 3 is turned on, connecting the signal line 1 to the ground side via the capacitor 2, and erasing the video signal B. However, the voltage state of the signal line 1 in this state is APL, that is, the average video level, and does not fall below this level.

Therefore, the depth of the synchronization signal A is not constant.

If an attempt is made to display characters in a state where the depth of the synchronization signal A is not constant, the displayed characters will tremble and stable display cannot be performed.

Means for Solving the Problem A switching element and a capacitor are successively connected between a signal line and ground, and a constant voltage circuit is connected to a midpoint between the switching element and the capacitor.

When the switching element is on, the constant voltage circuit adjusts the level of the signal line to the basic level of the synchronization signal, thereby stabilizing the depth of the synchronization signal at a constant level even when erasing the image. To display in a stable state.

Embodiment An embodiment of the present invention will be explained based on FIGS. 1 and 2. First, a series circuit 9 consisting of a switching transistor 7 as a switching element and a capacitor 8 denoted as C8 is connected to the signal line 6 between ground. A mute circuit 11 is connected to the switching transistor 7 via a resistor 10. Further, a constant voltage circuit 12 is connected to a midpoint between the switching transistor 7 and the capacitor 8. This constant voltage circuit 1
2 consists of a resistor R1 14 and a resistor 15 R1 connected in series between the power supply 13 indicated as Vcc and the ground, and the connection midpoint of these resistors 14 and 15 is connected to the switching transistor 7 and the capacitor. It is connected to the midpoint of the connection with 8.

In such a configuration, since the switching transistor 7 is in the off state when the mute state is not present, the video signal B is transmitted as shown in FIG. When a signal is input from the mute circuit 11 in this state, the switching transistor 7 is turned on, and the video signal B is erased via the capacitor 8. Further, the voltage level at the midpoint of the connection between the capacitor 8 and the switching transistor 7 is set by the constant voltage circuit 12 to match the basic level C of the synchronizing signal A. Therefore, the level of the signal line 6 in the muted state is maintained at the basic level C, so that the depth of the synchronizing signal A is constant regardless of whether the switching transistor 7 is on or off. Therefore, when characters are displayed in the second state, the display state is stable because it is performed using a constant synchronization signal A.

Effects of the Invention In the present invention, as described above, a series circuit of a switching element and a capacitor is sequentially connected between the signal line and the ground, and a constant voltage circuit is connected at the midpoint between the switching element and the capacitor. When there is a mute signal, the signal line level can be set to Bedistal level,
This makes it possible to keep the depth of the synchronization signal constant,
This has the effect that characters can be displayed in a stable manner.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram of a signal line, FIG. 3 is a circuit diagram showing an example of the conventional technology, and FIG. 4 is a waveform diagram thereof. 7... Switching transistor (switching element), 8... Capacitor, 9... Series circuit, 11...
・Mute circuit, 12...Constant voltage circuit amount Requester Tokyo Electric Co., Ltd. Fuji Photo Film Co., Ltd. 3" Figure 52

Claims (1)

[Claims] A series circuit of a switching element and a capacitor connected to a mute circuit is provided, the series circuit is connected to a signal line with the capacitor on the ground side, and a constant voltage circuit is connected to the midpoint of the connection between the switching element and the capacitor. A synchronization signal correction circuit at the time of mute, which is characterized in that it is connected.