JPS6393059A - Memory card - Google Patents

Abstract

PURPOSE:To prevent the destruction of identifying information stored in an identifying register and to protect this information, by inhibiting writing actions in the identifying register while a memory card is kept under a write protection state. CONSTITUTION:When the write protection state is secured with a WP switch 11 connected to a power supply VCC, the input terminal of an inverter gate 17 is set at an H level with the write protection signal set at an L level. Thus the output of an AND gate 13 is also set at the L level to inhibit the information to be written in a memory 1. Then a port address indicating write of the identifying information and the write signal are applied to a control circuit 9. Thus an identifying register load signal is set at the H level and given to the other input terminal of an AND gate 15. Even under such conditions, the input terminal at one side of the gate 15 is set at the L level since the write protection signal is kept at the L level. Then it is inhibited to write the identifying information in an identifying register 5.

Description

[Detailed Description of the Invention] Purpose of the Invention (Field of Industrial Application) The present invention relates to a memory card equipped with a write protection function and a built-in identification register, and in particular to protection of identification information stored in the identification register. The present invention relates to a memory card designed to

(Prior Art) In recent years, memory cards with memory chips embedded in credit-sized card-shaped packages have begun to be used, for example, as external storage devices U for microcomputers, etc., and the embedded memory chips vary depending on the purpose. There are various types and weights.

This kind of memory card is attached to the external device (main body) of the microcomputer through a connector provided on the memory card, and can be easily replaced. Information is input and output to and from external devices (main unit). In addition, the memory card is equipped with a program 1 to 1 to protect the old information by preventing erroneous reading of the memory set in the memory card.
Some have functions.

In this way, memory cards have different types and capacities (,
Since the external device (main body) can be freely replaced, if the memory card is replaced, the type of memory card, 8 pins, and the information written on it will be checked. There will be a need to identify.

Therefore, some memory cards have a built-in identification register that stores identification information for identifying the type and capacity of the memory card or the information written on the memory card. The identification information can be easily changed from the outside depending on the type of memory card and the information that has been entered.

(Problems to be Solved by the Invention) As explained above, the identification information stored in the identification register built into the memory card can be easily changed from the outside, so it is easy to mistakenly identify the card. If the information is outdated, it becomes difficult to easily determine the type, content, or information of the memory card, and in the worst case, the memory card becomes unusable. This will cause this problem.

Therefore, the present invention has been made in view of the above, and an object of the present invention is to provide a memory card that prevents erroneous writing to the identification register and protects the identification information stored in the identification register. do.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, a memory card is provided with a write protect function that prohibits writing to a memory embedded in the memory as necessary. In a memory card having a built-in identification register for storing written information or identification information for identifying the type, capacity, etc. of the memory card, the present invention provides for a memory card having a built-in identification register for storing written information or identification information for identifying the type, capacity, etc. of the memory card. It is constituted by trapping prohibition means that prohibits write operations to registers.

(Function) In the memory card of the present invention, when the memory card is in the write protect state, the operation of occupying the identification register is prohibited.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a memory card according to an embodiment of the present invention. This memory card includes a memory 1 that stores information supplied from a main body, such as a microcomputer (not shown), an address counter 3 that supplies addresses to the memory 1 when this memory 1 performs read and write operations, and an identification number. Identification register for storing information5.
Memory 1, address counter 3. a selector 7 for selectively outputting each output of the identification register 5; a memory 1; an address counter 3; Identification register5. It has a control circuit 9 that controls the selector 7. This memory card also includes a write protect switch (hereinafter referred to as "WP switch") 11 that prohibits the operation of storing information into the memory 1 as necessary.

Memory 1 has various types and capacities depending on the use and purpose of the memory card. memory is used.

In addition, in order to obtain a desired capacity (9), the memory 1 may be composed of a plurality of memories.When the output of an AND gate 13 to which a memory write signal and a write protect signal are input becomes high level, the memory 1 It stores information supplied from the main body, and when memory read f2 is input, the stored information is output to the main body via the selector 7.

Address counter 3 is connected to memory 1, and when the address counter read signal is input, it supplies memory 1 with any stored memory address or continuous memory addresses by a counting function that sequentially increments memory addresses. do. This memory address is written into the address counter 3 from the main body in advance by inputting an address counter load signal before reading and writing operations are performed on the memory 1. therefore,
A predetermined memory address is transferred from the main unit to address counter 3.
After being written to, memory 1 is accessed using the written memory address to perform a read or N write operation of the memory 1.

The identification register 5 stores identification information for identifying information stored in the memory 1 and identifying the type, capacity, etc. of the memory 1. Therefore, when the output of the AND gate 15 inputting the identification register load signal and the write process signal becomes high level, the identification register 5 determines whether the information stored in the memory 1 or the type of memory 1 is stored in the memory 1.
The stored identification information can be changed depending on the capacity, etc.

The selector 7 is connected to the memory 1, the address counter 3, and the identification register 5, and selects information stored in the memory 1 by inputting an enable signal.
Furthermore, when the address counter read signal is input, the memory address information stored in the address counter 3 is selected, and when the identification register read signal is input, the identification information stored in the identification register 5 is selected. The selected information is transferred to the main unit.

The control υU circuit 9 is connected to the memory 1. A signal DD' for controlling the input/output of information in the address counter 3 and identification register 5 is supplied to each of them. The control circuit 9 performs the following functions according to the port address given from the main body: 1.
Address counter 3. One of the identification registers 5 to which information is to be input/output is specified. Furthermore, according to the read signal and write signal given from the main body, a read signal (enable signal, memory read signal, address counter read signal, identification register read signal) that coordinates the read operation or a load signal that commands the write operation (Outputs memory load signal, address counter load signal, identification register load No. 13).

The WP switch 11 switches between the power supply VCC and the ground GND to give high level or low level trust to the input ends of inverter gates 1 to 17 whose output ends are connected to one input end of the AND gate 11. . therefore,
When the WP switch 11 is switched to the power supply VCO side, the write protect signal that is the output of the inverter gate 17 is at a low level, and when the WP switch 11 is switched to the ground GND side, the write protect signal 13 is at a high level. Become. This w P switch 1
1 is provided at the periphery of the memory card, as shown in FIG.

As explained above, this embodiment is constructed, and the operation of this embodiment will be explained next.

First, when the WP switch 11 is connected to the ground GND side, the input IN of the inverter gate 17 is at a low level, and the write protect signal is at a high level. Therefore, one input terminal of the AND gate 13 becomes a high level, and when the memory write signal becomes a high level, the output of the AND gate 13 becomes a high level, and an operation of corrupting information to the memory 1 is performed. Become.

Also, when the lie 1~protect signal becomes high level,
One input terminal of the AND gate 15 also becomes high level.

As a result, the identification register load signal g becomes high level, and the operation of loading the identification information into the identification register 5 is performed.

Next, when the WP switch 11 is connected to the power supply VCC side and the memory card enters the write protect state, the input terminal of the impark gate 17 becomes high level and the write protect signal becomes low level. As a result, one input terminal of the AND gate 13 becomes a low level, so that the output of the AND gate 13 becomes a low level, and the operation of filling information into the memory 1 is prohibited.

In such a state, when the boat address and write (No. 5) are given to the control circuit 9 in order to instruct writing of identification information to the identification register 5 of the memory card, the identification register load signal becomes high level. , this high level identification register load signal is applied to the other input terminal of AND gate 15. However, since write protect No. 13 is at low level, AND gate 15
One input terminal of becomes low level. Therefore, the output of the controller 15 becomes low level, and writing of identification information to the identification register 5.\ is prohibited.

In this way, when the memory card enters the write-protected state, writing of information to the identification register 5 is prohibited, thereby preventing erroneous writing to the identification register 5.

Although the memory card in this embodiment is of the I10 bus type, it goes without saying that a memory card of the memory bus type may also be used, and the type and capacity of the memory embedded in the above-mentioned memory card may be is not limited, and may be determined according to the specifications of the memory card.

[Effects of the Invention] As explained above, according to the present invention, when the memory card is in the write protect state, the operation of occupying the identification register is prohibited, so that the data stored in the identification register is It is possible to protect the identification information by preventing destruction of the identification information. As a result, it is possible to provide a memory card that can significantly improve the reliability of a system using the memory card.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the groove bottom of a memory card according to an embodiment of the present invention, and FIG. 2 is a diagram showing the external appearance of the memory card. (Explanation of symbols representing main parts in the figure) 5...Identification register 9...Control circuit 11...Write protect switch 15...AND gate

Claims (1)

[Claims] Equipped with a write protect function that prohibits writing to the memory embedded in the memory card as necessary, the information written in the memory or the type of memory card,
A memory card having a built-in identification register for storing identification information for identifying capacity, etc., characterized in that the memory card has a write inhibiting means for prohibiting a write operation to the identification register when the memory card is in a write protect state. memory card.