JPS6390910A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To constitute arbitrary filters (LPF, HPF, BPF, BEF) by setting a frequency division ratio of a programmable frequency devider from the outside. CONSTITUTION:registers 121-124 are provided in order to give arbitrary frequency division ratios of program frequency dividers 111-114, and latched through a data bus buffer 131 from a data bus of a microcomputer system. In this example, they are set as registers of 11 bits, but its bit length is in a relation between (fc) and an external clock frequency selection, and it is unnecessary to stick to 11 bits. In case of 11 bits, the programmable frequency division ratio can be set at every other unit extending from '0' to 2047. The data bus is usually of 8 bits, therefore, it necessary to input a data two times. Whether write of a data to the register is the lower 8 bits or the upper 3 bits is controlled by A2 being an MSB of an address bus.

Description

[Detailed Description of the Invention] [Industrial Application Fields] It can be used in a wide range of applications requiring filters, such as the following.

(Examples) a.Telecommunication field switchboards, telephones, modems, etc., remote control field alarm systems, heating and cooling systems, etc.C0 Various control equipmentMeasuring instruments, medical instruments, etc.D.Audio field Electronic organs, keyboards, various audio devices, etc.Mainly audio equipment Bandwidth (DC to 20 KI-1Z degree) filter.

[Conventional technology]

In recent years, switched capacitor filters (SCFs) using MOS switched capacitor circuits have been put into practical use, and are also being applied to industrial applications such as modems.

Each mode of the filter, such as "Ll)I", I-IPI"1 DPI", and BEI", can be realized by two operational amplifiers called BIQUAD, multiple 8 views, and an analog switch. Since the formulation for realizing the characteristics has already been made, it is only a matter of time to create a semiconductor integrated circuit.

Conventionally, each product is fully custom designed according to custom specifications, so the disadvantage is that the development period is long.

Furthermore, the efficiency of developing semiconductor integrated circuits is low because the filter design takes time and is done by a limited number of experienced filter circuit engineers.

Furthermore, since it is a specified semiconductor integrated circuit, there is no limit to the user's freedom to use it in any way he wants.

As the applications of filters are rapidly expanding, it is extremely important to be able to supply versatile semiconductor integrated circuits that allow users to freely determine and use their characteristics.

[Problems to be solved by the present invention]

As described above, the present invention provides a highly versatile and programmable filter whose characteristics can be set by the user.

[Means for solving problems]

The parts that determine the basic characteristics of the filter are built in advance on the semiconductor integrated circuit as biquad characteristics. What the user can set is simply the program frequency division ratio for determining fc, and the frequency division ratio can be interfaced with a microcomputer system, and then can be set arbitrarily.

〔Example〕

Hereinafter, embodiments will be described in detail based on the drawings.

FIG. 1 shows a block diagram of an embodiment of the present invention. The filter section is composed of a switched capacitor filter (SCF) and is a so-called biquad (131QUAD)
) using the circuit. In this embodiment, there are four independent biquads, but any number can be selected depending on the scale of integration. Biquad uses a low-pass filter (L
PF), bypass filter (HPF), band pass filter (I3PF), band erase filter (BEF)
can be configured, but the latter two can be realized by a combination of the former two, so here we will use LPFll-IP among the four biquads.
Each has two F's.

Figure 2 shows the LPF and 1-I of the biquad circuit.
This is shown for PF. While using the general type of biquad circuit, it is a specific circuit suitable for LPF and I-IPF. Basically, the characteristics of the filter are determined by the capacitance ratio, so an appropriate capacitance value is selected and manufactured.

The cutoff frequency (re) of the filter is set to cover the frequency range from DC to about 20 K1-1z in order to operate in the audio band. In order to be able to set this fc stepwise or continuously from the outside, any fc can be set for a certain external clock frequency (for example, a popular TV water total oscillator 3.58 MI (if z is used). A programmable frequency divider and a fixed frequency divider for correction are used to obtain the same result.The fixed frequency divider is shown as ÷N in Figure 1, but the value of N is several tens (for example, 40). ).The programmable frequency divider can be used to increase the frequency from 401-1 z to 20 K if there are 11 bits when the external clock frequency is 3.58 MHz.
fc up to 1-1 z can be obtained.

The register is for giving an arbitrary division ratio of the program frequency divider, and is latched from the data bus of the microcomputer system via the data bus buffer.

In this embodiment, it is set as an 11-bit register, but the bit length need not be limited to 11 bits depending on the relationship between fc and external clock frequency selection. In the case of 11 bits, the programmable division ratio is 1 from 0 to 2047.
It can be set for each unit. Since the data bus is normally 8 bits, data must be fetched twice. Control of whether data is written to the register into the lower 8 bits or the upper 3 bits is performed by A2, which is the 4SI3 of the address bus. When A2='O,, lower 8 bits, A2
= 'IN, the upper 3 bits are affirmed.

In this example, four independent biquad systems, frequency dividers,
Since it has a register group, A'8. of the address bus is used to distinguish which system of circuit the data is set for. ,A1
2 bits are used. Chip selection to accompany microcomputer system or city data?
Use l. The data write timing is determined by W7, from 10# of Wπ to '1. ．． revenge jm (rise)
Data is latched into the register at the timing of . These controls are performed by write logic and control word registers.

FIG. 3 shows the interface environment with the above microcomputer system. Of course, this LSI can also be operated independently without interfacing with a microcomputer system, in which case it can be turned on.
Fixed or controlled to either #IM or #IM.

FIG. 4 shows external connection conditions. Analog input is used for gain setting, prevention of aliasing noise, smoothing, etc.
It is input to the analog input terminal of this LSI through an additional circuit consisting of a resistor and a capacitor. The filter output can be taken out as is to drive an IOKΩ load, but if you want good attenuation characteristics or drive a 600Ω load, you can use the built-in operational amplifier to perform buffer 7-ring impedance matching.

13PF is, as mentioned earlier, LPF and I-I P.
Since it can be configured by connecting F in series, it can be realized by adding the filter output obtained in this way to the analog input of the next stage.

FIG. 5 shows the distribution of external clocks.

Usually, a method using a crystal resonator and a resistor is used using a built-in oscillation circuit. If you receive an external clock directly from another source, you can input it directly to the CLKIN terminal. Furthermore, if a plurality of four independent biquad systems inside the LSI can use the same clock frequency, only one crystal oscillation circuit section can be used.

In fact, since fC is configured so that the frequency division ratio of the programmable frequency divider can be set to an arbitrary value, it can be said that one built-in oscillation circuit provided as an LSI is sufficient.

FIG. 6 shows the 'I4i properties of the filter thus obtained. In this example, an LPF is configured and aims at fc=3200Hz. Attenuation outside the passband is 50αB or more,
It is fully possible to obtain a ripple within the passband of 0.1 dI3 or less.

Table 1 shows the division ratio of the programmable frequency divider from O to 20.
This is a part of a conversion table of fc values obtained by setting the value to any value up to 47. In this example, the frequency division ratio of the fixed frequency divider (÷N) shown in FIG. 1 is set to 40, but a value close to 1001-17 can be obtained as fc. It is possible to select and set the value closest to the desired fC from among these 2048 combinations.

FIG. 7 shows a case where data of this LSI is set using an EPROM. As mentioned above, since there are 2048 combinations, it is easy to use if all or the negative part of the combinations is written in the ROM. ICE (inser kit emulator) especially for checking system characteristics
It is effective if used as

Table 1 Programmable Filter (Frequency Division Ratio Table) [Effects of the Invention] As described above, according to the present invention, any filter can be constructed simply by using a plurality of independent biquads. Moreover, since the filter characteristics only need to be selected by selecting the external clock frequency and the division ratio of the program frequency divider in order to obtain the required rc, it can be easily used even by non-filter experts. Furthermore, since a microcomputer system is present in most of the environments in which the filter is used, by configuring the filter so that it can interface with the microcomputer system, it can be used as a peripheral LSI. L with the same chip
I) 1? , II P F,, I3 P I”, 1
3EF etc. can be configured, so it has a wide range of applications (for example, precom field, remote control field, various control devices,
It can be used in the audio field.

[Brief explanation of the drawing]

FIG. 1 shows a block diagram of an LSI according to the present invention. FIG. 2 (Tal, TI)l shows an example of a biquad circuit used in the present invention. FIG. 3 shows the interface of this LSI with a microcomputer system. FIG. 4 shows an example of external connections of this LSI. FIG. 5 shows external clock supply. FIG. 6 shows the attenuation characteristics outside the passband of the LPF realized by the present invention. FIG. 7 shows an example of setting data in this LSI from data stored in the EPROM. 101-104: Biquad 111-114: Programmable frequency divider 121-124
: Register 131 : Data bus buffer 7 132 : Write logic circuit 133 : Control word register Applicant: Seiko Epson Corporation (α) (b) Figure 2 Figure 3 Figure 5 Figure 70

Claims (1)

[Claims] Programmable frequency division is used in a semiconductor integrated circuit composed of a plurality of independent biquads (BIQUAD) composed of switched capacitor circuits and a programmable frequency divider that sets the cutoff frequency (fc) of the filter of the biquad. Any filter (LPF, HPF, BPF, B
A semiconductor integrated circuit characterized by being able to configure an EF).