JPS6390152A - Manufacture of substrate for semiconductor device - Google Patents

Manufacture of substrate for semiconductor device

Info

Publication number
JPS6390152A
JPS6390152A JP23596186A JP23596186A JPS6390152A JP S6390152 A JPS6390152 A JP S6390152A JP 23596186 A JP23596186 A JP 23596186A JP 23596186 A JP23596186 A JP 23596186A JP S6390152 A JPS6390152 A JP S6390152A
Authority
JP
Japan
Prior art keywords
substrate
layer
epitaxial layer
forming
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23596186A
Other languages
Japanese (ja)
Inventor
Kunihiko Kodama
邦彦 児玉
Hideki Yamawaki
秀樹 山脇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23596186A priority Critical patent/JPS6390152A/en
Publication of JPS6390152A publication Critical patent/JPS6390152A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To lower the dislocation density in such a way that a silicon layer for epitaxial growth is doped with group IV elements having a prescribed concen tration. CONSTITUTION:If an insulating layer 12 composed of magnesia spinel or the like is formed on an Si substrate 11 and this layer 12 is doped with Ge or the like from group IV elements with a high concentration of 5 X 10<20>/cm during the formation of a single-crystal silicon layer by epitaxial growth, the lattice constant of the epitaxial layer 13 doped with Ge deviates from the lattice constant of a Si epitaxial layer and the dislocation density is lowered. The lattice is matched accurately and a high-quality single-crystal layer is formed so that a highly reliable substrate for the formation of a semiconductor device can be obtained.

Description

【発明の詳細な説明】 〔概要〕 シリコン(Si)、或いはサファイア基板上にマグネシ
ャスピネル(MgO−A12o、)のような絶縁膜を形
成後、該絶縁膜上に単結晶のSiエピタキシャル層を形
成して5ilicon−ON−Insulator (
以下SOI と称する)基板を形成し、このSi層に半
導体素子を形成するSO1基板の形成方法であって、こ
のSiエピタキシャル層を形成する際に、炭素(C)や
、ゲルマ互つム(Ge)等の■族原子を該Siエピタキ
シャル層内に添加してSiと■族原子との間で混晶を形
成することで、形成されるSiエピタキシャル層を無転
位の状態として形成されるSO1基板の高信頼化を図る
[Detailed Description of the Invention] [Summary] After forming an insulating film such as magnetic spinel (MgO-A12o) on a silicon (Si) or sapphire substrate, a single crystal Si epitaxial layer is formed on the insulating film. Form 5ilicon-ON-Insulator (
This is a method for forming an SO1 substrate in which a substrate (hereinafter referred to as SOI) is formed and a semiconductor element is formed on this Si layer. ) etc. into the Si epitaxial layer to form a mixed crystal between Si and the group II atoms, the SO1 substrate is formed with the Si epitaxial layer formed in a dislocation-free state. Aim to improve reliability.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体素子形成用基板の製造方法に係わり、特
にSo1基板の製造方法に関する。
The present invention relates to a method of manufacturing a substrate for forming a semiconductor element, and particularly to a method of manufacturing a So1 substrate.

Si或いはサファイア基板上にマグネシャスピネルより
なる絶縁膜を形成し、この絶縁膜上に単結晶のSiエピ
タキシャル層を形成してSOI構造の半導体素子形成用
基板を形成し、このSi層に半導体素子を形成すると、
素子間分離工程が容易となったり、或いは形成される素
子の浮遊容量が減少する等の利点が有るため、高耐圧、
高集積のIC等の半導体装置形成に、このSol構造の
基板が、最近多く利用されるように成ってきている。
An insulating film made of magnetic spinel is formed on a Si or sapphire substrate, a single crystal Si epitaxial layer is formed on this insulating film to form a substrate for forming a semiconductor element with an SOI structure, and a semiconductor element is formed on this Si layer. When we form
It has the advantage of facilitating the isolation process between elements and reducing the stray capacitance of the formed elements.
Recently, substrates with this Sol structure have been increasingly used for forming semiconductor devices such as highly integrated ICs.

このような絶縁膜上に形成されるSiエピタキシャル層
は、通常のSi基板上に直接形成されるSiエピタキシ
ャル層に比較して転位密度が大きい欠点があり、この転
位密度を低下したSiエピタキシャル層を設けたSO■
基板が望まれている。
The Si epitaxial layer formed on such an insulating film has the disadvantage of a higher dislocation density than the Si epitaxial layer formed directly on a normal Si substrate. SO established
A substrate is desired.

〔従来の技術〕[Conventional technology]

従来、このようなSOI構造の半導体素子形成用基板を
形成する際、第3図に示すように、厚さが500μm程
度のSi基板1上に1000℃程度の成長温度で、塩化
マグネシウム(Mg Cj’z)、アルミニウム(Al
)を原料として用い、水素ガス、炭酸ガス、塩化水素ガ
スを反応ガスとして用いた化学蒸着(CVD)法により
マグネシャスピネル層よりなる絶縁層2を1μm程度の
厚さに形成する。
Conventionally, when forming a substrate for forming a semiconductor element having such an SOI structure, as shown in FIG. 3, magnesium chloride (Mg Cj 'z), aluminum (Al
) is used as a raw material, and an insulating layer 2 made of a magnetic spinel layer is formed to a thickness of about 1 μm by a chemical vapor deposition (CVD) method using hydrogen gas, carbon dioxide gas, and hydrogen chloride gas as reaction gases.

更にその上にシラン(SiH,)ガスを水素還元して単
結晶のSiエピタキシャル層3を素子形成に適した厚さ
に形成してsor構造の半導体素子形成用基板を形成し
ていた。
Furthermore, silane (SiH,) gas is reduced with hydrogen to form a single-crystal Si epitaxial layer 3 to a thickness suitable for device formation, thereby forming a substrate for forming a semiconductor device having a sor structure.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、上記したSol構造の基板のように、マグネ
シャスピネル膜より成る絶縁膜上に形成されたSiエピ
タキシャル層は、5i02膜より成る絶縁膜上に形成さ
れたSiエピタキシャル層より、格子整合が精度良く行
われているので、高品質なSiエピタキシャル層が得ら
れている。
By the way, the Si epitaxial layer formed on the insulating film made of the magnetic spinel film, like the substrate with the above-mentioned Sol structure, has a higher lattice matching accuracy than the Si epitaxial layer formed on the insulating film made of the 5i02 film. This is a well-performed method, and high-quality Si epitaxial layers can be obtained.

然し、このようにして形成したSiエピタキシャル層に
はl xlO”/ cn”程度の転位密度が発生し、素
子形成用に適したSiエピタキシャル層と成り難い。
However, the Si epitaxial layer formed in this manner has a dislocation density of approximately l xlO''/cn'', making it difficult to form a Si epitaxial layer suitable for device formation.

本発明は上記した問題点を除去し、絶縁膜上に形成され
たSiエピタキシャル層の転位密度を低下させるように
した半導体素子形成用基板の製造方法の提供を目的とす
る。
An object of the present invention is to provide a method for manufacturing a substrate for forming a semiconductor element, which eliminates the above-mentioned problems and reduces the dislocation density of a Si epitaxial layer formed on an insulating film.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体素子形成用基板の製造方法は、基板上に
絶縁膜を形成後、該絶縁膜上に単結晶シリコン層をエピ
タキシャル成長する際、前記エピタキシャル成長するシ
リコン層中に■族原子を5xlO”/ Cl11’以上
の濃度で添加する。
In the method for manufacturing a substrate for forming a semiconductor element of the present invention, after an insulating film is formed on the substrate, when a single crystal silicon layer is epitaxially grown on the insulating film, group II atoms are added to the epitaxially grown silicon layer by 5xlO''/ Add at a concentration of Cl11' or higher.

〔作用〕[Effect]

本発明の半導体素子形成用基板の製造方法は、形成され
るSiエピタキシャル層中に、■族原子を5 XIO”
/an3程度の高濃度に添加することで、形成されるS
iエピタキシャル層の格子定数を、Stの格子定数の5
.431人の値から外れるようにし、添加される■族原
子の種類によってエピタキシャル層の格子定数を大、小
いずれの方向へでもずらすようにして、絶縁膜の格子定
数と整合させるようにして形成されるエピタキシャル層
内の転位密度を低下させるようにする。
In the method for manufacturing a substrate for forming a semiconductor element of the present invention, in the Si epitaxial layer to be formed, group III atoms are added to 5XIO''
S formed by adding at a high concentration of /an3
The lattice constant of the i epitaxial layer is set to 5 of the lattice constant of St.
.. The lattice constant of the epitaxial layer is made to deviate from the value of 431 people, and the lattice constant of the epitaxial layer is shifted in either the large or small direction depending on the type of group III atoms added, so as to match the lattice constant of the insulating film. The aim is to reduce the dislocation density within the epitaxial layer.

〔実施例〕〔Example〕

以下、図面を用いながら本発明の一実施例につき詳細に
説明する。
Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

第1図に示すように、厚さが500μm程度のSt基板
11に前記した方法を用いてマグネシャスピネルよりな
る絶縁膜12を1μm程度の厚さに形成する。
As shown in FIG. 1, an insulating film 12 made of magnetic spinel is formed to a thickness of about 1 μm on an St substrate 11 having a thickness of about 500 μm using the method described above.

次いで該基板を第2図に示す反応管14内のサセラ°り
15に設置した状態で導入し、この反応管内14にバル
ブ16を介してシラン(5iH4)ガスを導入し、反応
管14内を900〜1000℃の温度に高周波コイル1
7を用いて加熱してシランガスを熱分解してSiのエピ
タキシャル層を形成する際に、同時に該反応管内に蒸発
器18に充填されている四塩化ゲルマニウム液をキャリ
アガスを用いて1発させてパルプ19を介して反応管1
4内に導入する。そしてこのゲルマニウムの塩化物のガ
スを、そのガス流量を調整して導入する。
Next, the substrate is introduced into the reaction tube 14 shown in FIG. High frequency coil 1 at a temperature of 900-1000℃
7 to thermally decompose the silane gas to form an epitaxial layer of Si, at the same time, the germanium tetrachloride liquid filled in the evaporator 18 is ejected once into the reaction tube using a carrier gas. Reaction tube 1 through pulp 19
It will be introduced within 4. Then, this germanium chloride gas is introduced by adjusting the gas flow rate.

また四塩化ゲルマニウムを添加する代わりに、ゲルマニ
ウムの水素化合物を導入しても良い。
Moreover, instead of adding germanium tetrachloride, a hydrogen compound of germanium may be introduced.

このようにして、第1図に示すように、形成されるSi
エピタキシャル層13にGeよりなる■族原子が5 x
1026/ cm″の濃度に添加されるようにする。
In this way, as shown in FIG.
In the epitaxial layer 13, there are 5 x group III atoms made of Ge.
1026/cm'' concentration.

このようにすれば、Siエピタキシャル層の格子定数は
、Ge原子を添加しない場合に比較して増大する。
In this way, the lattice constant of the Si epitaxial layer increases compared to the case where no Ge atoms are added.

そしてこの格子定数をマグネシャスピネル層の絶縁膜の
格子定数に近づけることで、マグネシャスピネル層から
の応力がSiエピタキシャル層に掛からないようになる
と共にSiとGeとの混晶が形成されることでSiエピ
タキシャル層の転位密度が従来の方法で形成した場合に
比較して1桁低下したSiエピタキシャル層が得られた
By making this lattice constant close to the lattice constant of the insulating film of the magnetic spinel layer, stress from the magnetic spinel layer is not applied to the Si epitaxial layer, and a mixed crystal of Si and Ge is formed. A Si epitaxial layer was obtained in which the dislocation density of the Si epitaxial layer was lowered by one order of magnitude compared to the case where the Si epitaxial layer was formed by the conventional method.

尚、本実施例ではSiエピタキシャル層に添加すべき■
族不純物原子としてGeを用いたが、その他反応管内に
メタンガス、或いは四塩化炭素ガスを導入してそのガス
の熱分解により、形成されるSiエピタキシャル層内に
炭素(C)原子を添加しても良い。
In addition, in this example, ■ to be added to the Si epitaxial layer
Although Ge was used as the group impurity atom, carbon (C) atoms may also be added to the Si epitaxial layer formed by introducing methane gas or carbon tetrachloride gas into the reaction tube and thermally decomposing the gas. good.

この炭素原子を添加した時には、形成されるStのエピ
タキシャル層の格子定数が低下する傾向がある。
When these carbon atoms are added, the lattice constant of the formed St epitaxial layer tends to decrease.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明の半導体素子形成用基板の製
造方法によれば、形成されるSOI基板のSiエピタキ
シャル層が低転位の結晶として得られ、このようなSO
1基板を用いて半導体装置を形成すれば、高信頬度の半
導体装置が得られる効果がある。
As described above, according to the method of manufacturing a substrate for forming a semiconductor element of the present invention, the Si epitaxial layer of the SOI substrate to be formed can be obtained as a low-dislocation crystal.
If a semiconductor device is formed using one substrate, a semiconductor device with high reliability can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の方法で形成した半導体素子形成用基板
の断面図、 第2図は本発明の方法に用いる装置の模式図、第3図は
従来の方法で形成した半導体素子形成用基板の断面図で
ある。 図に於いて、 11はSi基板、12はマグネシャスピネル層、13は
Geを添加したSiエピタキシャル層、14は反応管、
15はサセプタ、16.19はバルブ、17はコイル、
18は蒸発器を示す。
Fig. 1 is a cross-sectional view of a substrate for forming semiconductor elements formed by the method of the present invention, Fig. 2 is a schematic diagram of an apparatus used in the method of the invention, and Fig. 3 is a substrate for forming semiconductor elements formed by the conventional method. FIG. In the figure, 11 is a Si substrate, 12 is a magnetic spinel layer, 13 is a Ge-doped Si epitaxial layer, 14 is a reaction tube,
15 is a susceptor, 16.19 is a valve, 17 is a coil,
18 indicates an evaporator.

Claims (1)

【特許請求の範囲】 基板(11)上に絶縁膜(12)を形成後、該絶縁膜(
12)上に単結晶シリコン層(13)をエピタキシャル
成長する方法に於いて、 前記エピタキシャル成長するシリコン層(13)中にI
V族原子を5×10^2^0/cm^3以上の濃度で添
加したことを特徴とする半導体素子形成用基板の製造方
法。
[Claims] After forming an insulating film (12) on a substrate (11), the insulating film (
12) In the method of epitaxially growing a single crystal silicon layer (13) on the epitaxially grown silicon layer (13), I
A method for manufacturing a substrate for forming a semiconductor device, characterized in that group V atoms are added at a concentration of 5×10^2^0/cm^3 or more.
JP23596186A 1986-10-02 1986-10-02 Manufacture of substrate for semiconductor device Pending JPS6390152A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23596186A JPS6390152A (en) 1986-10-02 1986-10-02 Manufacture of substrate for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23596186A JPS6390152A (en) 1986-10-02 1986-10-02 Manufacture of substrate for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6390152A true JPS6390152A (en) 1988-04-21

Family

ID=16993777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23596186A Pending JPS6390152A (en) 1986-10-02 1986-10-02 Manufacture of substrate for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6390152A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05226247A (en) * 1991-10-08 1993-09-03 Internatl Business Mach Corp <Ibm> Epitaxial silicon film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05226247A (en) * 1991-10-08 1993-09-03 Internatl Business Mach Corp <Ibm> Epitaxial silicon film

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