JPS6388796U - - Google Patents

Description

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a voice clock according to an embodiment of the present invention. FIG. 2 is a time chart showing the operation of FIG. 1. 2...Clock circuit, 10...Speech synthesis circuit, 16...Sound generation circuit, 18...Shift register, 24...Level detection circuit, 28a-28f...LED.

Claims (1)

[Scope of utility model registration request] an oscillator, an external switch, and an oscillator that receives an oscillation output signal from the oscillator, measures time, outputs a time display signal, outputs address data corresponding to the time in response to operation of the external switch, and further oscillates the oscillator. a clock circuit that outputs a constant periodic signal obtained by dividing the output signal; a display section that receives a time display signal from the clock circuit and displays the time; and a display section that receives an address data signal from the clock circuit and displays the address data. A speech synthesis circuit that reads out the data necessary for speech generation in response to the output and outputs a speech signal, and also outputs a speech output detection signal to notify that the speech signal is being output, and a speech synthesis circuit that receives the speech signal from this speech synthesis circuit. a sound generation circuit that generates a sound by using a sound output signal, and a level detection circuit that detects when the amplitude level of the sound signal is equal to or higher than a certain level; A shift register to which a detection signal from the circuit is connected to a data input and a constant periodic signal from the clock circuit to a clock input; and a plurality of light emitting display elements connected to the output side of the shift register. A voice clock characterized by the following features: