JPS6387938U - - Google Patents

Info

Publication number
JPS6387938U
JPS6387938U JP1986181834U JP18183486U JPS6387938U JP S6387938 U JPS6387938 U JP S6387938U JP 1986181834 U JP1986181834 U JP 1986181834U JP 18183486 U JP18183486 U JP 18183486U JP S6387938 U JPS6387938 U JP S6387938U
Authority
JP
Japan
Prior art keywords
signal
circuit
fundamental frequency
frequency
fundamental
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986181834U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986181834U priority Critical patent/JPS6387938U/ja
Publication of JPS6387938U publication Critical patent/JPS6387938U/ja
Pending legal-status Critical Current

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Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路図、第2図は
網制御回路のブロツク図、第3図は第1図の基本
周波数検出回路のブロツク図、第4図は本考案の
一実施例のタイムチヤート、第5図は本考案のカ
ウンター及びf〜f制御回路のタイムチヤー
トである。 1…モデム回路、2…トランス、3…網制御回
路、5…端子台、6…極性反転検出回路、7…c
i信号検出回路、8…PB信号送出回路、9…P
B信号制御回路、10…基本周波数指定スイツチ
、11…PB信号発生回路、12…テスト用リレ
ー、13…信号aa′、14…基本周波数検出回
路、15…ゲート、16…L1、17…信号c〜
c′、18…交流直流化回路、9…クロツク、2
0…デイジタル信号、21…カウンター、22…
〜f制御回路、23…信号f、23′…
の信号f′〜f′、24…ゲート。
Figure 1 is a circuit diagram of an embodiment of the present invention, Figure 2 is a block diagram of a network control circuit, Figure 3 is a block diagram of the fundamental frequency detection circuit of Figure 1, and Figure 4 is an implementation of the present invention. An example time chart, FIG. 5, is a time chart of the counter and f 1 to f 7 control circuit of the present invention. DESCRIPTION OF SYMBOLS 1...Modem circuit, 2...Transformer, 3...Network control circuit, 5...Terminal block, 6...Polarity reversal detection circuit, 7...c
i signal detection circuit, 8...PB signal sending circuit, 9...P
B signal control circuit, 10... Basic frequency designation switch, 11... PB signal generation circuit, 12... Test relay, 13... Signal aa', 14... Fundamental frequency detection circuit, 15... Gate, 16... L1, 17... Signal c ~
c', 18... AC/DC conversion circuit, 9... Clock, 2
0...Digital signal, 21...Counter, 22...
f1 to f7 control circuit, 23...signal f1 , 23'...
Signals f 1 ′ to f 7 ′, 24...gate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 2つの基本周波数の変調信号であるPB信号の
基本周波数を指示により送出可能な網制御装置に
おいて、送出された基本周波数を検出する回路を
設けることにより周波数の検出を可能とする事を
特徴とするPB信号用基本周波数の自己テスト回
路。
A network control device capable of transmitting the fundamental frequency of a PB signal, which is a modulated signal of two fundamental frequencies, upon instruction, characterized in that the frequency can be detected by providing a circuit for detecting the transmitted fundamental frequency. Self-test circuit for fundamental frequency of PB signal.
JP1986181834U 1986-11-28 1986-11-28 Pending JPS6387938U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986181834U JPS6387938U (en) 1986-11-28 1986-11-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986181834U JPS6387938U (en) 1986-11-28 1986-11-28

Publications (1)

Publication Number Publication Date
JPS6387938U true JPS6387938U (en) 1988-06-08

Family

ID=31127070

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986181834U Pending JPS6387938U (en) 1986-11-28 1986-11-28

Country Status (1)

Country Link
JP (1) JPS6387938U (en)

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