JPS6386903A - Trap circuit device - Google Patents

Trap circuit device

Info

Publication number
JPS6386903A
JPS6386903A JP23163086A JP23163086A JPS6386903A JP S6386903 A JPS6386903 A JP S6386903A JP 23163086 A JP23163086 A JP 23163086A JP 23163086 A JP23163086 A JP 23163086A JP S6386903 A JPS6386903 A JP S6386903A
Authority
JP
Japan
Prior art keywords
ground pin
chip capacitor
dielectric substrate
microstrip line
metallic ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23163086A
Other languages
Japanese (ja)
Inventor
Hiroshi Takahashi
広志 高橋
Ichiro Koyama
一郎 小山
Yuuji Oosumi
勇二 大炭
Takeshi Sato
毅 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP23163086A priority Critical patent/JPS6386903A/en
Publication of JPS6386903A publication Critical patent/JPS6386903A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components

Abstract

PURPOSE:To stabilize the characteristic without using an air-core coil by a microstrip line, a chip capacitor, and a metallic ground pin on the other face of a dielectric substrate whose one face is a ground surface, connecting the chip capacitor in parallel to the microstrip line, and also, grounding it through the metallic ground pin. CONSTITUTION:The metallic ground pin 12 is inserted from the reverse side of a dielectric substrate 14 and passes through the dielectric substrate 14, and soldered to one electrode of a chip capacitor 11 on the surface of the substrate. The other electrode of the chip capacitor 11 is soldered to a microstrip line 9. Also, the metallic ground pin 12 is soldered to a ground conductor on the reverse side of the dielectric substrate 14. For instance, the thickness of the dielectric substrate is 0.6mm, the shape of the metallic ground pin is cylindrical, and its diameter is 1.2mm. Also, when the capacity of the chip capacitor is 10PF, a trap is generated in 1.7GHz. As for the trap frequency, by varying the capacity value of the chip capacitor and the shape of the metallic ground pin, an arbitrary frequency is obtained.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、マイクロ波通信機等に使用されるトラップ回
路装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a trap circuit device used in microwave communication devices and the like.

従来の技術 従来、この種のトラップ回路装置は、第６図に示すよう
な構成であった。第６図において、１はマイクロストリ
ップ線路、２はチップコンデンサ、３は空心コイル、４
はスルホール、６は誘電体基板、６は入力ポート７．７
は出力ポートである。信号は、入力ポートロから入射さ
れ、出力ポードアから取り出される。トラ・フプ周波数
はテ・ンプコンデンサ２のキャパシタンスＣと空心コイ
ル３のインダクタンスＬより次式で求められる。BACKGROUND OF THE INVENTION Conventionally, this type of trap circuit device has had a configuration as shown in FIG. In Figure 6, 1 is a microstrip line, 2 is a chip capacitor, 3 is an air-core coil, and 4 is a microstrip line.
is a through hole, 6 is a dielectric substrate, 6 is an input port 7.7
is an output port. Signals are input through the input port door and taken out through the output port door. The frequency is determined from the capacitance C of the temperature capacitor 2 and the inductance L of the air-core coil 3 using the following equation.

ス Ｌ：空心コイルのインダクタンス 発明が解決しようとする問題点 このような従来の構成によるトラップ回路装置では、空
心コイルを用いるため、微少インダクタンスの実現が難
しいため、１ＧＨ２以上の周波数で特性が安定したトラ
ップを実現することが困難であり、また量産時には空心
コイルの調整工程が必要であるなどの問題があった。S: Inductance of air-core coils Problems that the invention aims to solve In trap circuit devices with such conventional configurations, since air-core coils are used, it is difficult to realize minute inductance. It was difficult to realize the trap, and there were other problems such as the need for an adjustment process for the air-core coil during mass production.

本発明は、以上の点に鑑みてなされたものであり、空心
コイルを用いることなく安定した優れた特性を有するト
ラップ回路装置を提供することを目的とするものである
。The present invention has been made in view of the above points, and it is an object of the present invention to provide a trap circuit device having stable and excellent characteristics without using an air-core coil.

問題点を解決するための手段 上記問題点を解決する本発明の技術的手段は、空心コイ
ルによるインダクタンスを用いるのではなく、一端が誘
電体基板の接地面と電気的に接続された金属接地ピンの
有するインダクタンスを利用するものであり、この金属
接地ピンの形状により所望のインダクタンスを実現する
ものである。Means for Solving the Problems The technical means of the present invention for solving the above problems is to use a metal ground pin, one end of which is electrically connected to the ground plane of the dielectric substrate, instead of using an inductance using an air-core coil. The desired inductance is realized by the shape of this metal ground pin.

なおこの金属接地ピンは、スルホールを兼用することに
もなる。トラップ回路は、誘電体基板上のマイクロスト
リ・ツブ線路とこれに並列接続されたチップコンデンサ
をこの所望インダクタンスを有する金属接地ピンを介し
て接地することによって構成する。Note that this metal ground pin also serves as a through hole. The trap circuit is constructed by grounding a microstrip tube line on a dielectric substrate and a chip capacitor connected in parallel thereto via a metal ground pin having the desired inductance.

作用 この技術的手段による作用は次のようになる。action The effect of this technical means is as follows.

すなわち、チップコンデンサの一方の電極はマイクロス
）　ＩＪヮブ線路と接続され、他方の電極は金属接地ピ
ンを介して接地されているため、チップコンデンサのキ
ャパシタンスと金属接地ピンの有するインダクタンスで
直列共振回路が形成されトラップ回路が構成される。金
属接地ピンの長さを誘電体基板の厚み程度にし、径を適
当に選定すると微少インダクタンスが実現できるため、
１ＧＨｚ以上のトラップも十分可能となる。このような
構成にすると空心コイルを用いないため、高い周波数で
も安定した特性を有するトラップが得られる。In other words, one electrode of the chip capacitor is connected to the IJ wave line, and the other electrode is grounded via the metal ground pin, so series resonance occurs between the capacitance of the chip capacitor and the inductance of the metal ground pin. A circuit is formed to configure a trap circuit. By making the length of the metal ground pin about the same as the thickness of the dielectric substrate and selecting the diameter appropriately, a minute inductance can be achieved.
Trapping of 1 GHz or more is also possible. With this configuration, since no air-core coil is used, a trap having stable characteristics even at high frequencies can be obtained.

実施例 以下、本発明の一実施例を添付図面に基づいて説明する
。EXAMPLE Hereinafter, an example of the present invention will be described based on the accompanying drawings.

第１図は本発明のトラップ回路装置の斜視図、第２図は
第１図のムー五′断面図である。第１図において、８は
信号入力端子、９はマイクロストリップ線路、１ｏは信
号出力端子、１１はチップコンデンサ、１２は金属接地
ピン、１３は接地導体、１４は誘電体基板である。FIG. 1 is a perspective view of the trap circuit device of the present invention, and FIG. 2 is a cross-sectional view of the trap circuit device of the present invention. In FIG. 1, 8 is a signal input terminal, 9 is a microstrip line, 1o is a signal output terminal, 11 is a chip capacitor, 12 is a metal ground pin, 13 is a ground conductor, and 14 is a dielectric substrate.

第３図は金属接地ピンの斜視図である。金属接地ピン１
２は、誘電体基板１４の裏面より挿入され誘電体基板１
４を貫通し、基板表面にてチップコンデンサ１１の一方
の電極と半田付けされている。チップコンデンサ１１の
他方の電極はマイクロストリップ線路９と半田付けされ
ている。また金属接地ピン１２は誘電体基板１４の鼻面
にて接地導体と半田付けされている。本実施例の場合、
誘電体基板の厚みはｏ、ａｓｓで、金属接地ピンの形状
は円筒形であり、その径は１．２語である。FIG. 3 is a perspective view of the metal ground pin. Metal ground pin 1
2 is inserted from the back side of the dielectric substrate 14 and is inserted into the dielectric substrate 1
4 and is soldered to one electrode of the chip capacitor 11 on the surface of the substrate. The other electrode of the chip capacitor 11 is soldered to the microstrip line 9. Further, the metal ground pin 12 is soldered to a ground conductor on the nose surface of the dielectric substrate 14. In the case of this example,
The thickness of the dielectric substrate is o,ass, and the shape of the metal ground pin is cylindrical, and its diameter is 1.2mm.

第４図は、チップコンデンサの容量が１０　ＰＦの場合
の伝送特性を示している。この場合１．７ＧＨ２でトラ
ップが生じている。なお、トラップ周波数は、チップコ
ンデンサの容量値や金属接地ピンの形状を変化させるこ
とにより、任意の周波数が得られる。FIG. 4 shows the transmission characteristics when the capacitance of the chip capacitor is 10 PF. In this case, a trap occurs at 1.7GH2. Note that an arbitrary trap frequency can be obtained by changing the capacitance value of the chip capacitor and the shape of the metal ground pin.

発明の効果 以上のように本発明によれば、空心コイルを用いること
なく、金属接地ピンの有するインダクタンスを利用する
ことにより簡単な構成で、安定した特性を有するトラッ
プ回路装置が得られる。Effects of the Invention As described above, according to the present invention, a trap circuit device having a simple structure and stable characteristics can be obtained by utilizing the inductance of the metal ground pin without using an air-core coil.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本発明の一実施例によるトラップ回路装置の斜
視図、第２図は第１図の入−人′断面図、第３図は金属
接地ピンの斜視図、第４図は同装置の特性図、第６図は
従来のトラップ回路装置を示す概略図である。 ８・・・・・・信号入力端子、９・・・・・・マイクロ
ストリップ線路、１０・・・・・・信号出力端子、１１
・・・・・・テップコンデンサ、１２・・・・・・金属
接地ピン、１３・・・・・・接地導体。 代理人の氏名　弁理士　中　尾　敏　男　ほか１名第１
図 第２図 第３図 ＆ 第４図 ｔ、ｏｏ　　　　　　　　＋ｔ、ｏ。 間　フ皮数　（Ｃｒｕｚ） 第５図1 is a perspective view of a trap circuit device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of the trap circuit device shown in FIG. 1, FIG. 3 is a perspective view of a metal ground pin, and FIG. 4 is a perspective view of the same device FIG. 6 is a schematic diagram showing a conventional trap circuit device. 8...Signal input terminal, 9...Microstrip line, 10...Signal output terminal, 11
...Tep capacitor, 12...Metal ground pin, 13...Ground conductor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure 3 & Figure 4 t,oo +t,o. Number of skins (Cruz) Figure 5

Claims (1)

【特許請求の範囲】[Claims] 　片面を接地面とした誘電体基板の他面に、マイクロス
トリップ線路、チップコンデンサ、及び前記誘電体基板
を貫通し一端が前記誘電体基板の接地面と電気的に接続
された金属接地ピンを具備し、前記チップコンデンサは
、前記マイクロストリップ線路と並列に接続し、かつ前
記金属接地ピンを介して接地したことを特徴とするトラ
ップ回路装置。A dielectric substrate with one side as a ground plane is provided with a microstrip line, a chip capacitor, and a metal ground pin that penetrates the dielectric substrate and has one end electrically connected to the ground plane of the dielectric substrate on the other side. The trap circuit device is characterized in that the chip capacitor is connected in parallel with the microstrip line and grounded via the metal ground pin.
JP23163086A 1986-09-30 1986-09-30 Trap circuit device Pending JPS6386903A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23163086A JPS6386903A (en) 1986-09-30 1986-09-30 Trap circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23163086A JPS6386903A (en) 1986-09-30 1986-09-30 Trap circuit device

Publications (1)

Publication Number Publication Date
JPS6386903A true JPS6386903A (en) 1988-04-18

Family

ID=16926517

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23163086A Pending JPS6386903A (en) 1986-09-30 1986-09-30 Trap circuit device

Country Status (1)

Country Link
JP (1) JPS6386903A (en)

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