JPS6384236A - Power detection circuit - Google Patents

Abstract

PURPOSE:To detect the presence or absence of a receiver side power supply from the sender side and to eliminate the need for the detection private signal line by detecting the presence or absence of the receiver side power supply from the collector potential of a transistor (TR) provided to the sender side. CONSTITUTION:When a receiver side power supply 8 is normal and an L signal is fed to a signal input terminal 2, a TR 6 is turned off, a TR 5 is turned off also, the base voltage of the TR 5 reaches the same level as the power supply 8. Thus, the TR 4 is turned on and its collector goes to 0 potential, and the signal at a power supply presence or absence detecting terminal 1 is at L level. In applying an H signal to the terminal 2, the TRs 6,5 are turned on and the TR 4 is turned off, an L signal is obtained from the terminal 1. If a power supply 8 is interrupted, since no voltage is given to a receiver side signal line 16, even if the signal of the terminal 2 goes to H, both TRs 5, 6 are not turned on and the signal at the terminal 1 is the same level as the power supply 3, that is, at H level. In detecting the signal of the terminal in such a manner, the presence or absence of the receiver side power supply is supervised surely by the sender side.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a power detection circuit that detects a power supply voltage on a receiving side on a transmitting side.

(Prior Art) Conventionally, as a data transmission device that transmits data from a transmitting terminal to a receiving terminal via a signal line, the transmitting side opens or grounds the signal line depending on the signal to be transmitted, and the receiving side closes or closes the signal line. Some devices have a configuration in which the signal line is connected to a power source via an up resistor and a signal is received from the potential of this signal line. In such a data transmission device, if the receiving side is powered off, data transmission becomes impossible. Conventionally, therefore, a configuration has been adopted in which a means for detecting whether the power source is connected or disconnected is provided on the receiving side, and the result of this detection is notified to the transmitting side via a dedicated signal line separate from that for data transmission.

(Problems to be Solved by the Invention) However, in the above-mentioned conventional device, an extra dedicated signal line was required in addition to the signal line for data transmission to directly connect the transmitting side and the receiving side.

Therefore, an object of the present invention is to provide a power detection circuit that eliminates the dedicated signal QIW described above and allows the transmitting side to monitor the presence or absence of power on the receiving side.

[Structure of the invention]

(Means for Solving the Problems) The present invention includes a switching means that turns on and off according to a signal to be transmitted, a first transistor whose emitter is connected to the switching means and whose base is connected to a signal line, and a collector. A second transistor is commonly connected to the collector of the first transistor via a diode, has an emitter grounded, and has a base connected to the signal line, and supplies power to the collector of the second transistor via a resistor. A first power source is provided on the transmitting side, a second power source that supplies power to the signal line via a resistor, and a receiving side is provided with means for receiving the signal to be transmitted from the potential of the signal line; The device is characterized in that disconnection or disconnection of the second power source on the receiving side is detected from the collector potential of the second transistor on the receiving side.

(Function) According to the present invention, when the second power supply is present and the signal to be transmitted is low level, the switching means is turned off, the first transistor is turned off, but the second transistor is turned on and the signal to be transmitted is at a low level. The collector potential of transistor No. 2 becomes low level. If the second power supply is present and the signal to be transmitted is at a high level, the second transistor is turned off but the switching means is turned on.The first transistor is turned on and the collector potential of the second transistor is low. level. In addition, if there is no second power supply, the first transistor and the second transistor are turned off regardless of whether the signal to be transmitted is low level or high level, and the collector potential of the second transistor becomes high level. . in the end,
The collector potential of the second transistor is at a low level if the second power supply is present, and is at a high level if there is no second power supply, regardless of whether the signal to be transmitted is at a low level or a high level. Based on the collector potential of this second transistor, the presence or absence of the second power source is detected.

(Example) In FIG. 1, the part including the power supply 3, the transistors 4, 5°6, the diode 7, the resistors 9, 10, 11, 12°13, and the transmitting side signal 1% 115 is the transmitting side, and the power supply 8, A portion including the resistor 14 and the receiving side signal line 16 is the receiving side.

Further, terminal 1 is a power supply presence/absence detection terminal for detecting the presence or absence of power supply 8, and terminal 2 is a signal input terminal for inputting a signal to be sent to the receiving side. Also, the resistance value of resistor 10 is resistor 1
The resistance value is much larger than the resistance value of 3.

First, the operation when the receiving side power supply 8 is normally applied and data transmission is performed will be explained using the timing chart shown in FIG. 2. In FIG. 2, a period T1 indicates a case where the receiving side power supply 8 is normally applied, and a period T2 indicates a case where the receiving side power supply 8 is turned off.

Consider the case where the power supply 8 on the receiving side is normally applied as shown in FIG. 2(b), and in this state a signal as shown in FIG. 2(a) is applied to the signal input terminal 2. The signal applied to the signal input terminal 2 is applied to the base of the switching transistor 6.

Here, if this signal is at a low level (hereinafter referred to as "L"), no voltage is applied to the base of the transistor 6, so the transistor 6 is off (see FIG. 2(C)). Therefore, transistor 5 is also off (
Figure 2 (see d>).

Here, since no current flows to the base of the transistor 5, no current also flows to the receiving side signal ti116. Therefore, the voltage applied to the base of transistor 5 is at the same level as power supply 8 on the receiving side. As a result, current flows through the resistor 10 to the base of the transistor 4, turning on the transistor 4 (see FIG. 2(e)). When the transistor 4 is turned on, the collector of the transistor 4 becomes approximately O potential, and the signal generated at the terminal 1 becomes "L".

Next, when the signal applied to the signal input terminal 2 becomes high level (hereinafter referred to as "H"), a base current flows to the base of the transistor 6 via the transmission side signal line 15 and the resistor 12, and the transistor 6 is turned on.

As a result, a base current flows from the power supply 8 to the transistor 5 via the resistor 14, the receiving side signal line 16, and the resistor 13, and the transistor 5 is turned on.

By turning on the transistor 5, the collector potential of the transistor 5 becomes approximately O potential.

At this time, due to the relationship between the resistance values of the resistor 13 and the resistor 10, no base current flows to the base of the transistor 4, and the transistor 4 is turned off. After all, if the power supply 8 is present, that is, if the power supply 8 is normally applied, regardless of whether the signal applied to the signal input terminal 2 is "H" or "L"', a "L" signal will be output from the power supply detection terminal 1. A signal is obtained.The receiving signal can be detected on the receiving side by monitoring the current flowing through the receiving side signal line 16.

Next, a case where the power supply 8 on the receiving side is cut off for some reason will be described.

In this case, when the receiving side power supply 8 is cut off as shown in FIG. 2(b), no voltage is applied to the receiving side signal line 16, and therefore no voltage is applied to the bases of the transistors 5 and 4.

Here, when the signal at the signal input terminal 2 becomes "H", the transistor 6 is turned on, but as described above, the transistor 5 is not turned on because no voltage is applied to its base. Also, transistor 4 does not turn on because no voltage is applied to its base. Therefore, the signal at the power supply presence/absence detection terminal 1 is at the same level as the power supply 3, that is, "H". After all, when the power source 8 on the receiving side is strong, that is, when it comes to a certain point, an "H" signal is obtained from the power supply presence/absence detection terminal 1 regardless of the level of the signal input terminal 2.

In this way, by detecting the signal obtained from the N source presence detection terminal 1 on the receiving side, the presence or absence of the power source 8 on the receiving side can be reliably determined on the transmitting side.

〔Effect of the invention〕

As explained above, according to the present invention, the sending side can monitor the presence or absence of a power source on the receiving side, and there is no need for a dedicated signal line for power detection, so there is an advantage that the multiplier of the signal line is reduced by one. be.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing one embodiment of the power detection circuit of the present invention, and FIG. 2 is a timing chart illustrating the operation of the circuit shown in FIG. 1. 1...Power supply presence/absence detection terminal, 2...Signal input terminal, 3
... Power supply for transmitting side, 4... Transistor for voltage detection, 5... Transistor for voltage detection, 6... Transistor for switch, 7... Diode for preventing reverse bias, 8... Receiving side power supply, 9...Resistor, 10...Resistor, 11...Resistor, 12...Resistor, 13...Resistor, 14...Resistor, 15...Sending side signal line, 16...・
・Receiving side signal line.

Claims (2)

[Claims] (1) A switching means that turns on and off according to the signal to be transmitted; a first transistor whose emitter is connected to the switching means and whose base is connected to the signal line; and whose collector is the collector of the first transistor and a diode. The transmission side includes a second transistor that is commonly connected through a resistor, has an emitter that is grounded, and has a base that is connected to the signal line, and a first power supply that supplies power to the collector of the second transistor via a resistor. A receiving side includes a second power source that supplies power to the signal line via a resistor, and a means for receiving the signal to be transmitted from the potential of the signal line, and the collector potential of the second transistor on the transmitting side is A power detection circuit that detects the presence or absence of the second power source on the receiving side from the power source. (2) The power detection circuit according to claim (1), wherein the switching means is a transistor.