JPS6383259A - Sputtering device - Google Patents

Sputtering device

Info

Publication number
JPS6383259A
JPS6383259A JP22659286A JP22659286A JPS6383259A JP S6383259 A JPS6383259 A JP S6383259A JP 22659286 A JP22659286 A JP 22659286A JP 22659286 A JP22659286 A JP 22659286A JP S6383259 A JPS6383259 A JP S6383259A
Authority
JP
Japan
Prior art keywords
film thickness
sputtering
value
target
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22659286A
Other languages
Japanese (ja)
Inventor
Kenichi Kubo
久保 謙一
Ikuo Tomita
冨田 生夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP22659286A priority Critical patent/JPS6383259A/en
Publication of JPS6383259A publication Critical patent/JPS6383259A/en
Pending legal-status Critical Current

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  • Physical Vapour Deposition (AREA)

Abstract

PURPOSE:To control a vapor deposited film thickness to a set value with high reliability in a sputtering operation by measuring the vapor deposited film, comparing the same with a preset film thickness and changing sputtering conditions according to the result thereof. CONSTITUTION:The thin film of a target 11 material by the ionization of the gaseous Ar introduced from a pipe 22 is deposited by evaporation on a semiconductor wafer 8 in a treatment chamber 5, the inside of which is evacuated to a vacuum by a vacuum pump 34. The semiconductor wafer 8 is carried to a film thickness gage 30, by which the film thickness is measured. The measured value is inputted to a film thickness controller 31. Since the prescribed film thickness value is set in the controller 31 by a film thickness set value inputting device 32, the value is compared with the set value. The time for the sputtering treatment, the electric power to be supplied to the target 11, etc., are automatically controlled by the difference between the measured value and set value of the film thickness, by which the film thickness by sputtering on the wafer 8 is exactly controlled to the set film thickness.

Description

【発明の詳細な説明】 [発明の目的] 〈産業上の利用分野) 本発明はスパッタリング装置に係り、特に膜厚制御機構
を備えたスパッタリング装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] <Industrial Application Field> The present invention relates to a sputtering apparatus, and particularly to a sputtering apparatus equipped with a film thickness control mechanism.

(従来の技術) 近年、超LSI構造における薄膜形成装置としてターゲ
ットをイオン粒子等の高エネルギー粒子によりスパッタ
してターゲラ!・から飛翔した粒子を基板例えば半導体
ウェハに付着させて薄膜を形成するスパッタリング装置
が盛んに使用されている。
(Prior art) In recent years, Targetera! has been used as a thin film forming device for ultra-LSI structures by sputtering a target with high-energy particles such as ion particles.・Sputtering equipment is widely used to form a thin film by attaching particles ejected from a substrate to a substrate, such as a semiconductor wafer.

このようなスパッタリング装置では、スパッタ処理量の
増加にともないターゲットか消耗するなめ、ターゲラ1
〜スパツタ質敬に対する膜(=1質量の比率いわゆる成
膜効率が低下し作業初期の膜Iゾ敏が得られなくなると
いう問題かある。そこでこの問題を解決するために通常
スパッタリンク装置には、膜厚値をモニタしなからスパ
ッタリング条件例えばターグツ1〜への供給電力量やス
パッタ処理時間等を調整して膜17量を制御する膜厚制
御機構が設けられている。
In such sputtering equipment, as the amount of sputtering increases, the target wears out.
~ Film to sputter quality (=1 mass ratio) There is a problem that the so-called film formation efficiency decreases and it becomes impossible to obtain the film I sensitivity at the initial stage of the work.To solve this problem, the sputter link equipment usually uses the following methods: A film thickness control mechanism is provided which monitors the film thickness value and controls the amount of the film 17 by adjusting sputtering conditions such as the amount of power supplied to the targets 1 and the sputtering processing time.

ところで従来の膜厚制御機構における膜厚測定方法は、
クリスタル発振器等の膜厚検出センサをスパッタ反応槽
内に設置し、この膜厚検出センサに付着した薄膜の膜厚
値から基板上に形成された薄膜の膜Jf値を推定するい
わゆる間接的な測定方法により行なわれていた。
By the way, the film thickness measurement method in the conventional film thickness control mechanism is as follows:
A so-called indirect measurement in which a film thickness detection sensor such as a crystal oscillator is installed in a sputtering reaction tank, and the film Jf value of a thin film formed on a substrate is estimated from the film thickness value of the thin film attached to this film thickness detection sensor. It was done by method.

(発明が解決しようとする問題点) しかしながらスパッタ反応槽内にはスパッタ電極部、基
板保持器具、基板搬送装置等多くの機器が′Fj、雑に
配置されているなめ正確な膜厚値が測定できる場所に膜
厚検出センサを設置することが困難であること、特にタ
ーゲット近傍に磁界を発生させてこの磁界内にガスプラ
ズマを閉込めてスパフタリングを行なうマグネトロンス
パッタリング装置においては、ターゲットと基板との間
隙が狭いため膜厚検出センサを正確な膜厚が測定できる
位置例えば処理対称物近傍に設置することが困難である
こと、また膜厚値の測定方法が間接的な方法であること
等から精度の高い膜厚測定を行なうことができないとい
う問題があった。この問題を解決するなめにターゲット
への供給電力量と電力供給時間との積算値すなわち積算
電力値から膜1γ値を算出してW!t、厚制御を行なう
ことも考えられているが、実際に処理基板の膜厚値を測
定する手段ではないので、スパッタ作業中にスパッタリ
ング条件例えば供給電源の電圧値や電流値等が変化した
場合には算出された膜厚値と実際の膜厚値とが一致しな
いという問題があった。
(Problem to be solved by the invention) However, in the sputtering reaction tank, many devices such as sputtering electrodes, substrate holding devices, and substrate transporting devices are arranged in a haphazard manner, making it difficult to measure accurate film thickness values. It is difficult to install a film thickness detection sensor in a location where it is possible, especially in magnetron sputtering equipment that generates a magnetic field near the target and confines gas plasma within this magnetic field to perform sputtering. It is difficult to install the film thickness detection sensor in a position where accurate film thickness can be measured, for example near the object to be processed, because the gap between the film thickness and the film thickness is narrow, and the method of measuring the film thickness value is an indirect method. Therefore, there was a problem in that highly accurate film thickness measurement could not be performed. To solve this problem, calculate the film 1γ value from the integrated value of the amount of power supplied to the target and the time of power supply, that is, the integrated power value.W! Thickness control is also being considered, but since it is not a means to actually measure the film thickness of the processed substrate, it may be difficult to control the thickness if the sputtering conditions, such as the voltage or current value of the power supply, change during the sputtering process. There was a problem that the calculated film thickness value and the actual film thickness value did not match.

また基板上に形成された薄膜を直接測定する方法として
、一定の処理枚数ごとに作業員かスパッタ処理した基板
をサンプリングして膜厚を測定しこの膜厚測定値からタ
ーグツ1〜への供給電力量や電力供給時間を人為的に調
整する方法もとられているが、基板のサンプリングのタ
イミンクかずれて不良品発生が生じる恐れがあること、
人為的にスパッタリンク条件の調整を行なうこと等から
精度の高い膜厚制御ができないという問題があり、さら
には作業の完全自動化を行なうに際し大きな障害となっ
ていた。
In addition, as a method of directly measuring the thin film formed on the substrate, a worker samples the sputtered substrate every certain number of substrates and measures the film thickness, and from this film thickness measurement value, the power supplied to Targtsu 1 ~ Although methods are being used to artificially adjust the amount and power supply time, there is a risk that the timing of board sampling may be off, resulting in defective products.
There is a problem in that highly accurate film thickness control cannot be achieved due to the artificial adjustment of sputter link conditions, and furthermore, this has been a major obstacle in fully automating the work.

以上のように従来の膜厚制御機構では、膜厚値を正確に
求めることができないこと、人為的にスパッタリング条
件の調整を行なうこと等から精度の高い膜厚制御を行な
うことが非常に困難であった。
As described above, with conventional film thickness control mechanisms, it is extremely difficult to perform highly accurate film thickness control because film thickness values cannot be determined accurately and sputtering conditions must be adjusted artificially. there were.

本発明は上述した問題点を解決するためになされたもの
で、膜厚制御の精度向上がはかれしかもスパッタ作業の
完全自動化に容易に対応可能なスパッタリング装置を提
供することを目的とする。
The present invention has been made in order to solve the above-mentioned problems, and an object of the present invention is to provide a sputtering apparatus that can improve the precision of film thickness control and can easily handle complete automation of sputtering operations.

[発明の構成] (問題点を解決するための手段) 本発明のスパッタリング装置は、ターゲットをスパッタ
しこのターゲットから飛翔した粒子を基板」−に付着さ
せ薄膜を形成するスパッタリング手段と、このスパッタ
リング手段によりスパッタリングされた基板の膜厚を測
定する膜厚測定手段と、この膜厚測定手段の測定値と予
め設定された基準膜厚値とを比較する比較手段と、この
比較手−5= 段の出力に応じてスパッタリング手段のスパッタリング
条件を制御する制御手段を備えたことを特徴とするもの
である。
[Structure of the Invention] (Means for Solving the Problems) The sputtering apparatus of the present invention includes a sputtering means for sputtering a target and depositing particles flying from the target on a substrate to form a thin film, and this sputtering means. a film thickness measuring means for measuring the film thickness of the substrate sputtered by the method; a comparing means for comparing the measured value of the film thickness measuring means with a preset reference film thickness value; The apparatus is characterized in that it includes a control means for controlling sputtering conditions of the sputtering means in accordance with the output.

(作 用) 本発明では予め所望の膜厚値を設定しておき、膜厚計に
より常時もしくは定期的に基板に形成された膜厚を測定
し、この測定値と上記膜厚設定値との比較結果により自
動的にスパッタリング条件を変更して膜厚制御をするこ
とで信頼性の高い膜厚制御ができ、しかもスパッタ作業
の完全自動化に容易に対応することができる。
(Function) In the present invention, a desired film thickness value is set in advance, the film thickness formed on the substrate is constantly or periodically measured using a film thickness meter, and this measured value is compared with the above-mentioned film thickness setting value. By automatically changing the sputtering conditions and controlling the film thickness based on the comparison results, highly reliable film thickness control can be achieved, and the sputtering operation can be fully automated.

(実施例) 以下本発明をマグネトロンスパッタリング装置に適用し
な一実施例について説明する。
(Example) An example in which the present invention is not applied to a magnetron sputtering apparatus will be described below.

気密を保持する円柱状の反応槽1内にはそれぞれ円筒状
に構成されたウェハ処理室例えばウェハ挿脱室2、エツ
チング処理室3、ウェハ加熱室4、第1スパツタ処理室
5、第2スパツタ処理室6かそれぞれ半導体ウェハの処
理工程順に並置されている。そして、半導体ウェハはウ
ェハ挿脱室2から図示を省略した搬送装置により反応槽
1内に挿入され、各処理室間を順に送られながら所定の
処理が施され、一方つエバ挿脱室2からは順次処理の完
了した半導体ウェハを取り出すとともに新たな半導体ウ
ェハを挿入する。
Inside the cylindrical reaction tank 1 which maintains airtightness, there are cylindrical wafer processing chambers such as a wafer insertion/removal chamber 2, an etching processing chamber 3, a wafer heating chamber 4, a first sputter processing chamber 5, and a second sputter processing chamber. The processing chambers 6 are arranged in parallel in the order of semiconductor wafer processing steps. Then, the semiconductor wafer is inserted into the reaction tank 1 from the wafer insertion/removal chamber 2 by a transport device (not shown), and is sequentially sent between the processing chambers and subjected to a predetermined process. sequentially takes out the semiconductor wafers that have been processed and inserts new semiconductor wafers.

上記スパッタ処理室のさらに具体的な構成を第2図を参
照にして説明する。  ゛ スパッタ処理室5内にはスパッタ電極部7が反応槽1内
壁面と平行に設けられており、このスi<ツタ電極部7
と対向して半導体ウェハ8が配置されている。
A more specific configuration of the sputtering chamber will be described with reference to FIG. 2.゛In the sputtering chamber 5, a sputtering electrode section 7 is provided parallel to the inner wall surface of the reaction chamber 1, and this sputtering electrode section 7
A semiconductor wafer 8 is placed opposite to.

スパッタ電極部7側面方向にはこれを覆うように円筒状
の隔壁9がスパッタ電極部7背面の反応槽1内壁面から
延設されており、この隔壁9の前縁部と反応槽1内壁と
の間には、反応槽1内の雰囲気気体が各処理室間を流通
可能となるように間隙10が設けられている。
A cylindrical partition wall 9 extends from the inner wall surface of the reaction tank 1 on the back side of the sputter electrode part 7 so as to cover the sputter electrode part 7 in the side direction, and the front edge of the partition wall 9 and the inner wall of the reaction tank 1 are connected to each other. A gap 10 is provided between them so that the atmospheric gas in the reaction tank 1 can flow between the respective processing chambers.

スパッタ電極部7は供給電源33と接続されている逆円
錐リング状スパッタ面のターゲ・ント11と、このター
ゲット11の中心部に配置された円板状の一方極例えば
N磁極12と、ターゲット11の外周部を取り囲むよう
に隔壁9前縁部に装着された環状の他方径例えばS磁極
13とから構成されており、これら磁極12.13によ
りターゲット11のスパッタ面近傍に弧状の磁界Aを形
成する。この弧状の磁界Aは後述する生成されたプラズ
マ粒子を一時閉じ込める作用をする。
The sputter electrode section 7 includes a target 11 having an inverted conical ring-shaped sputtering surface connected to a power supply 33, a disc-shaped one pole such as an N magnetic pole 12 disposed at the center of the target 11, and the target 11. For example, an S magnetic pole 13 is attached to the front edge of the partition wall 9 so as to surround the outer periphery of the target 11. do. This arc-shaped magnetic field A acts to temporarily confine generated plasma particles, which will be described later.

隔壁9前縁部にはこれとわずかな間隙をおいて駆動機構
14により隔壁開口を開閉する円板状のシャッタ15が
設けられている。
A disk-shaped shutter 15 is provided at the front edge of the partition wall 9 with a slight gap therebetween and is opened and closed by a drive mechanism 14 to open and close the partition opening.

隔壁9前縁部と反応槽1内壁面との間隙10には、ウェ
ハ固定用孔17にクリップ18で半導体ウェハ8を保持
した回転可能な円板状のトランスファープレート1つと
、1ヘランスフアープレート19の隔壁9側に位置し図
示を省略した密着@横によりI・ランスファープレー1
・19を押圧する円板状のプレッシャープレー1〜20
が反応槽1内壁と平行にそれぞれ設けられている。これ
らトランスファープレート1つ、プレッシャープレート
20および反応槽1内壁面はそれぞれ離間可能に取り付
4−1られており、半導体ウェハ8を他の処理室例えば
第2スパツタ処理室6に移動する際には、プレッシャー
プレート20を隔壁9側に後退させてトランスファープ
レート1つが回転可能な状態とする。なお、図示した状
態はスパッタ処理中を示しており、トランスファープレ
ート19がプレッシャープレート20に押圧されてその
移動が拘束されている状態を示している。
In the gap 10 between the front edge of the partition wall 9 and the inner wall surface of the reaction chamber 1, there are provided one rotatable disk-shaped transfer plate that holds the semiconductor wafer 8 with a clip 18 in the wafer fixing hole 17, and one Herans force plate. Close contact @ side, located on the bulkhead 9 side of 19 and omitted from illustration, I/Lanfer play 1
・Disc-shaped pressure play 1 to 20 that presses 19
are provided parallel to the inner wall of the reaction tank 1, respectively. These one transfer plate, the pressure plate 20, and the inner wall surface of the reaction chamber 1 are each attached 4-1 so that they can be separated from each other, so that when the semiconductor wafer 8 is transferred to another processing chamber, for example, the second sputter processing chamber 6, , the pressure plate 20 is moved back to the partition wall 9 side, and one transfer plate is made rotatable. Note that the illustrated state shows that the sputtering process is in progress, and shows a state in which the transfer plate 19 is pressed by the pressure plate 20 and its movement is restricted.

半導体ウェハ8裏面にはウェハ予備加熱用のし−タブロ
ック21が配置されており、このヒータブロック21を
貫通してスパッタリングガス導入管22が設けられてい
る。反応気体発生器35で生成されたスパッタリングガ
スはこのガス導入管22内を流れて半導体ウェハ8裏面
外周に設けられた排出口22aより反応槽1内へ流入す
る。
A heater block 21 for preheating the wafer is arranged on the back surface of the semiconductor wafer 8, and a sputtering gas introduction pipe 22 is provided passing through the heater block 21. The sputtering gas generated by the reaction gas generator 35 flows through the gas introduction pipe 22 and flows into the reaction chamber 1 through an outlet 22 a provided on the outer periphery of the back surface of the semiconductor wafer 8 .

反応Jf!1外部には半導体ウェハ8に形成された薄膜
の厚さを測定して膜厚値信号を出力するための膜厚計3
0が設けられており、この膜厚計30から出力された膜
厚値信号が膜厚制御装置31に入力されるようになって
いる。
Reaction Jf! 1 Externally, there is a film thickness meter 3 for measuring the thickness of the thin film formed on the semiconductor wafer 8 and outputting a film thickness value signal.
0 is provided, and the film thickness value signal output from this film thickness meter 30 is input to the film thickness control device 31.

膜厚制御袋W 31は予め所望の膜厚値を設定するため
の膜厚設定値入力袋W32から入力された信号と上記膜
厚信号とを比較してスパッタリング条件、例えばスパッ
タ処理時間やターゲットへの電力供給量等を制御するた
めの装置であり、本例では供給電源33を制御してター
ゲットへの電力供給量の増減を行なうものである。また
必要に応じて磁界を制御してもよい。これら膜厚計30
、膜厚制御装置31および膜厚設定値入力装置32から
膜厚制御系が構成されている。
The film thickness control bag W 31 compares the film thickness signal with the signal inputted from the film thickness setting value input bag W 32 for setting a desired film thickness value in advance, and determines the sputtering conditions, such as the sputtering time and the target. This is a device for controlling the amount of power supplied to the target, and in this example, controls the power supply 33 to increase or decrease the amount of power supplied to the target. Further, the magnetic field may be controlled as necessary. These film thickness gauges are 30
, a film thickness control device 31, and a film thickness setting value input device 32 constitute a film thickness control system.

このようなスパッタリング装置のスパッタ作業は、まず
スパッタ処理室5内に半導体ウェハ8を搬送した後、反
応[1内を真空ポンプ23により高真空例えば1O−7
Torrとし、高温のスパッタリングガス例えばアルゴ
ンガスをガス導入管22から導入する。このときスパッ
タリングガスの熱がヒータブロックを21を介して半導
体ウェハ8に伝達されこれを加熱する。次に予め定めら
れたプログラムによって適当なタイミングで供給電源3
3よりターゲット11に電力を印加して反応槽1内に導
入したスパッタリングガスをターゲット11近傍でプラ
ズマ化する。プラズマ化したスパッタリングガスはター
ゲット11近傍に発生した磁界Aにより図中Bで示す如
くターゲット11のスパッタ面近傍にドーナツ状に一時
閉じ込められ、このとき励起されたプラズマ粒子がター
ゲラ1〜11に衝突して飛翔粒子aをたたき出ず。そし
てシャッタ15が回転して開いたとき、たたき出された
飛翔粒子aがスパッタ処理室内に飛散し、この飛翔粒子
の一部が半導体ウェハ8上に付着堆積して薄膜形成が達
成される。
The sputtering operation of such a sputtering apparatus is performed by first transporting the semiconductor wafer 8 into the sputtering chamber 5, and then vacuuming the inside of the reaction chamber 1 with a vacuum pump 23 to a high vacuum, e.g.
Torr, and a high-temperature sputtering gas, such as argon gas, is introduced from the gas introduction pipe 22. At this time, the heat of the sputtering gas is transferred to the semiconductor wafer 8 through the heater block 21 and heats it. Next, the power supply 3 is supplied at an appropriate timing according to a predetermined program.
3, electric power is applied to the target 11 to turn the sputtering gas introduced into the reaction chamber 1 into plasma near the target 11. The sputtering gas turned into plasma is temporarily confined in a donut shape near the sputtering surface of the target 11 as shown by B in the figure due to the magnetic field A generated near the target 11, and the plasma particles excited at this time collide with the target particles 1 to 11. without ejecting flying particles a. When the shutter 15 rotates and opens, the flying particles a are scattered into the sputtering chamber, and some of these flying particles adhere and deposit on the semiconductor wafer 8 to form a thin film.

このようにしてスパッタ処理の完了した半導体ウェハは
膜厚計30へと搬送され、ここで膜厚制御を行なう際の
制御パラメータとなる膜厚値が測定される。
The semiconductor wafer that has undergone the sputtering process in this manner is transferred to the film thickness gauge 30, where the film thickness value that is used as a control parameter when controlling the film thickness is measured.

以下に第3図のフローチャー1〜を参照にして本例の膜
厚制御系の動作について説明する。
The operation of the film thickness control system of this example will be described below with reference to flowcharts 1 to 3 in FIG.

まずスパッタ処理が完了した半導体ウェハをウェハ挿脱
室2から反応槽1外へ取り出し図示を省略した搬送装置
により膜厚計30へと搬送して半導体ウェハ上に形成さ
れた薄膜の膜厚を測定する(100)。
First, a semiconductor wafer that has been subjected to sputtering is taken out of the wafer insertion/removal chamber 2 to the outside of the reaction chamber 1 and transported to a film thickness meter 30 by a transport device (not shown) to measure the thickness of the thin film formed on the semiconductor wafer. Do (100).

膜厚計30で測定された膜Jブ測定値は、膜厚測定値信
号として膜厚制御装置31へ出力される。
The film thickness measurement value measured by the film thickness meter 30 is outputted to the film thickness control device 31 as a film thickness measurement value signal.

膜厚制御装置31では予め膜1γ設定値入力装置32か
ら入力された膜厚設定値と上記膜厚測定値とを比較しく
101) 、膜厚設定値とg!膜厚測定値等しい場合に
は正常な成膜作業が行なわれていると判断して現状のス
パッタ作業を継続しく102) 、膜厚測定値が膜厚設
定値と異なる場合には両名の膜厚値の差をターゲラ1へ
11への供給電力量の補正層に変換しこの情報を供給電
力量補正信号として供給電源33へ出力する(103)
。供給電源33では供給電力量補正信号を受けてターゲ
ット11への印加電力供給量を増減、例えば膜厚測定値
か膜厚設定値よりも小さい場合には電力供給量を増量す
る(10/l)。なお、上記各動作は全て自動的に行な
われる。
The film thickness control device 31 compares the film thickness setting value input in advance from the film 1γ setting value input device 32 with the film thickness measurement value (101), and calculates the film thickness setting value and g! If the measured film thickness values are equal, it is determined that the film forming operation is being performed normally and the current sputtering operation is continued102); if the measured film thickness value is different from the film thickness setting value, both film forming operations are performed. The difference in the thickness value is converted into a correction layer for the amount of power supplied to the targeters 1 and 11, and this information is output as a correction signal for the amount of power supplied to the power supply 33 (103).
. The power supply 33 receives the power supply correction signal and increases or decreases the power supply amount to the target 11. For example, if the measured film thickness value is smaller than the film thickness setting value, the power supply amount is increased (10/l). . Note that all of the above operations are performed automatically.

このようにスパッタ処理の完了した半導体ウェハの膜厚
値を自動的に測定して膜厚制御を行なうことで膜厚制御
の精度を向上させることができ、しかも作業工程の完全
自動化に容易に対応することができる。
In this way, by automatically measuring the film thickness value of semiconductor wafers that have undergone sputtering and performing film thickness control, it is possible to improve the accuracy of film thickness control, and moreover, it is easy to fully automate the work process. can do.

上記実施例では、毎回のスパッタ処理ごとに膜厚制御を
行なったが、定期的に半導体ウェハのサンプリンクを行
なって膜厚値を測定しその都度膜厚制御を行なってもよ
い。またこのようなスパッタリング装置を用いたスパッ
タ作業では、ウェハカセット単位で多数の半導体ウェハ
を連続的に処理する場合が多く、このような場合には1
力セツト分の半導体ウェハの平均膜厚値を算出してこの
平均膜厚値と膜厚設定値とを比較する方法がウェハカセ
ット単位の管理という観点からは好都合である。
In the above embodiment, the film thickness was controlled for each sputtering process, but the film thickness may be controlled by periodically sampling the semiconductor wafer and measuring the film thickness value. In addition, in sputtering operations using such sputtering equipment, a large number of semiconductor wafers are often processed continuously in wafer cassette units, and in such cases, one
From the viewpoint of managing each wafer cassette, it is convenient to calculate the average film thickness value of the semiconductor wafer for the force set and compare this average film thickness value with the film thickness setting value.

以下に本発明の他の実施例として1力セツト分の半導体
ウェハの平均膜厚値を算出し、この平均膜厚値と膜厚設
定値を比較して膜厚制御を行なう手段を説明する。
Below, as another embodiment of the present invention, a means for calculating the average film thickness value of a semiconductor wafer for one force set and comparing the average film thickness value with a film thickness setting value to perform film thickness control will be described.

第4図に示したように膜厚制御装置31に入力した各半
導体ウェハの膜厚測定値を一時記憶し、まず第1のカセ
ット内の半導体ウェハの処理が全て終了した時点でこれ
ら半導体ウェハの平均膜厚測定値を算出する(101a
)。次に平均膜厚測定値と膜厚設定値とを比較しく10
1)この両者の値が異なる場合には供給電力量補正信号
を出力する(103)。
As shown in FIG. 4, the film thickness measurement values of each semiconductor wafer input to the film thickness control device 31 are temporarily stored, and when all the semiconductor wafers in the first cassette have been processed, Calculate the average film thickness measurement (101a
). Next, compare the average film thickness measurement value and the film thickness setting value.
1) If these two values are different, a supplied power amount correction signal is output (103).

このとき第1カセット分の平均膜厚測定値をXlとし、
予め設定した膜厚設定値をS、供給電源からのターゲッ
トへの供給電力量をP、第1回目の補正後の供給電力量
をPlとおけば第1カセツ1〜終了時の供給電力量P1
は以下の式で表わせる。
At this time, the average film thickness measurement value for the first cassette is set as Xl,
If the preset film thickness setting value is S, the amount of power supplied to the target from the power supply is P, and the amount of power supplied after the first correction is Pl, then the amount of power supplied from the first cassette 1 to the end is P1.
can be expressed by the following formula.

P+=Px  s 同様に第2カセット終了時の供給電力fP2は、P2−
Px S ′X S X +     X 2 以下同様にして、第nカセット終了時の供給電力#Po
は、 S      S Po =Pア    ××033.1.×Sx、   
  X2         Xnと表わぜる。よって最
終的な供給電力量の総修正量は S ××、01.1.×S x、     x2           x口となる
P+=Px s Similarly, the supplied power fP2 at the end of the second cassette is P2-
Px S ′X S
is S S Po =Pa XX033.1. ×Sx,
Expressed as X2 Xn. Therefore, the total amount of correction of the final power supply amount is S XX, 01.1. ×S x, x2 x mouth.

上述実施例では膜厚制御をターゲット11への供給電力
量で行なったが、本発明はこれに限定されるものではな
く、例えば第5図に示したようにスパッタ処理時間を制
御してもよい。すなわち膜厚制御装置31に入力した膜
厚測定値と膜厚設定値との差をスパッタ処理時間の補正
量に変換しこれを出力する(105)。供給電源33で
はスパッタ処理時間補正信号を受けてターケラ1へへの
電力供給時間を増減する(106)。
In the above embodiment, the film thickness was controlled by the amount of power supplied to the target 11, but the present invention is not limited to this. For example, the sputtering time may be controlled as shown in FIG. . That is, the difference between the film thickness measurement value input to the film thickness control device 31 and the film thickness setting value is converted into a correction amount for the sputtering processing time, and this is output (105). The power supply 33 receives the sputtering processing time correction signal and increases or decreases the power supply time to the turquoise 1 (106).

このように本発明はスパッタリング条件に関する要素の
制御であればいずれにも適用が可能である。なお本発明
に用いるMW計としては、うす電流方式のものや4端針
プロ一ブ方式のもの等いずれでもよく特に機種に限定さ
れるものではない。
As described above, the present invention can be applied to any control of elements related to sputtering conditions. The MW meter used in the present invention may be of any type, such as a thin current type or a four-point probe type, and is not particularly limited to the model.

これら膜厚値を積算するとターゲットの寿命検出を知る
ことも可能である。
By integrating these film thickness values, it is also possible to know the lifespan of the target.

また予め設定する膜厚値をスパッタ開始期がち連続又は
断続した各時間に対応した膜厚値を記憶設定ずれは、完
全な中間層の制御も自動的に行うことができる。
Further, by storing a preset film thickness value corresponding to each continuous or intermittent time period at the start of sputtering, and setting deviation, complete control of the intermediate layer can be performed automatically.

[発明の効果] 以上説明したように本発明のスパッタリング装置によれ
ば、膜厚制御の精度向上がはかれ、しかもスパッタ作業
の完全自動化に容易に対応することが可能となる。
[Effects of the Invention] As explained above, according to the sputtering apparatus of the present invention, the accuracy of film thickness control can be improved, and moreover, it becomes possible to easily support complete automation of sputtering operations.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を適用したマグネトロンスパッタリング
装置のウェハ処理室の配置を示す斜視図、第2図は第1
図のスパッタ処理室の拡大断面図、第3図は第1図実施
例の膜厚制御装置の動作を示すフローチャート、第4図
は第2の実施例の膜厚制御装置の動作を示すフローチャ
ート、第5図は第3の実施例の膜厚制御装置の動作を示
すフローチャー1〜である。 1・・・・・・反応槽、5・・・・・・スパッタ処理室
、7・・・用スパッタ電極、8・・・・・・半導体ウェ
ハ、11・旧・・ターゲット、30・・・・・・膜厚計
、31・・・用膜厚制御装置、32・・・・・・膜厚設
定値久方装置、33・旧・・供給電源、34・・・・・
・真空ポンプ、35・旧・・反応気体発生器。 出願人  東京エレクトロン株式会社 代理人  弁理士  須 山 佐 − 第1 図
FIG. 1 is a perspective view showing the arrangement of a wafer processing chamber of a magnetron sputtering apparatus to which the present invention is applied, and FIG.
3 is a flowchart showing the operation of the film thickness control device of the embodiment shown in FIG. 1; FIG. 4 is a flowchart showing the operation of the film thickness control device of the second embodiment; FIG. 5 is a flowchart 1 to 1 showing the operation of the film thickness control device of the third embodiment. 1... Reaction tank, 5... Sputtering chamber, 7... Sputtering electrode, 8... Semiconductor wafer, 11... Old target, 30... ...Film thickness meter, 31...Film thickness control device, 32...Film thickness setting value Kugata device, 33.Old...Power supply, 34...
・Vacuum pump, 35. Old...Reaction gas generator. Applicant Tokyo Electron Co., Ltd. Agent Patent Attorney Sasu Suyama - Figure 1

Claims (3)

【特許請求の範囲】[Claims] (1)ターゲットをスパッタし前記ターゲットから飛翔
した粒子を基板上に付着させ薄膜を形成するスパッタリ
ング手段と、このスパッタリング手段によりスパッタリ
ングされた基板の膜厚を測定する膜厚測定手段と、この
膜厚測定手段の測定値と予め設定された基準膜厚値とを
比較する比較手段と、この比較手段の出力に応じて前記
スパッタリング手段のスパッタリング条件を制御する制
御手段とを備えたことを特徴とするスパッタリング装置
(1) A sputtering means for sputtering a target and depositing particles flying from the target onto a substrate to form a thin film; a film thickness measuring means for measuring the thickness of the substrate sputtered by the sputtering means; It is characterized by comprising a comparison means for comparing the measured value of the measurement means and a preset reference film thickness value, and a control means for controlling the sputtering conditions of the sputtering means according to the output of the comparison means. Sputtering equipment.
(2)膜厚制御手段が制御するスパッタリング条件がタ
ーゲットへの供給電力量であることを特徴とする特許請
求の範囲第1項記載のスパッタリング装置。
(2) The sputtering apparatus according to claim 1, wherein the sputtering condition controlled by the film thickness control means is the amount of power supplied to the target.
(3)膜厚制御手段が制御するスパッタリング条件がス
パッタ処理時間であることを特徴とする特許請求の範囲
第1項記載のスパッタリング装置。
(3) The sputtering apparatus according to claim 1, wherein the sputtering condition controlled by the film thickness control means is a sputtering time.
JP22659286A 1986-09-25 1986-09-25 Sputtering device Pending JPS6383259A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22659286A JPS6383259A (en) 1986-09-25 1986-09-25 Sputtering device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22659286A JPS6383259A (en) 1986-09-25 1986-09-25 Sputtering device

Publications (1)

Publication Number Publication Date
JPS6383259A true JPS6383259A (en) 1988-04-13

Family

ID=16847597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22659286A Pending JPS6383259A (en) 1986-09-25 1986-09-25 Sputtering device

Country Status (1)

Country Link
JP (1) JPS6383259A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11814718B2 (en) * 2015-03-31 2023-11-14 Bühler Alzenau Gmbh Method for producing coated substrates

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58141381A (en) * 1982-02-15 1983-08-22 Hitachi Ltd Thin film forming device
JPS60197875A (en) * 1984-03-19 1985-10-07 Ulvac Corp Automatic film formation control device for sputtering device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58141381A (en) * 1982-02-15 1983-08-22 Hitachi Ltd Thin film forming device
JPS60197875A (en) * 1984-03-19 1985-10-07 Ulvac Corp Automatic film formation control device for sputtering device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11814718B2 (en) * 2015-03-31 2023-11-14 Bühler Alzenau Gmbh Method for producing coated substrates

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