JPS6382177A - Display device - Google Patents

Display device

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Publication number
JPS6382177A
JPS6382177A JP61227362A JP22736286A JPS6382177A JP S6382177 A JPS6382177 A JP S6382177A JP 61227362 A JP61227362 A JP 61227362A JP 22736286 A JP22736286 A JP 22736286A JP S6382177 A JPS6382177 A JP S6382177A
Authority
JP
Japan
Prior art keywords
elements
signal
nmij
pmij
liquid crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61227362A
Other languages
Japanese (ja)
Other versions
JPH07112259B2 (en
Inventor
Takeshi Matsushita
松下 孟史
Mitsuo Soneda
曽根田 光生
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP61227362A priority Critical patent/JPH07112259B2/en
Publication of JPS6382177A publication Critical patent/JPS6382177A/en
Publication of JPH07112259B2 publication Critical patent/JPH07112259B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Transforming Electric Information Into Light Information (AREA)

Abstract

PURPOSE:To prove the reliability of the titled device by using a complementary element so as to form a selecting element thereby decreasing the level of a drive signal for signal selection. CONSTITUTION:A MOS selection element Mij consists of N-channel elements MMij and P-channel elements PMij being complementary elements, and the gates are connected respectively to signal lines Ai and the inverse of Ai. Then a data signal line Dj and one end of a liquid crystal display element Cij are connected between the source and drain of the elements NMij and PNij. Moreover, the other end of the liquid crystal element Cij is connected to a common target terminal T. In giving a signal A to the data signal line Dj, a drive signal of opposite polarity is given to the address signal line Ai, inverse of Ai thereby conducting the elements NMij, PMij at each pulse period. Thus, the input signal is given to the liquid crystal element Cij through the elements NMij and PMij, the element PMij is conducted sufficiently when the input signal is at a high level and the N-channel element NMij is conducted sufficiently when the signal is at a low level.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、例えば液晶表示素子を用いるディスプレイ装
置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a display device using, for example, a liquid crystal display element.

〔発明の概要〕[Summary of the invention]

本発明はディスプレイ装置に関し、相補型の素子を用い
て選択素子を形成することにより、信号選択の駆動信号
のレベルを小さくして装置の信頼性を向上させるように
するものである。
The present invention relates to a display device, and by forming a selection element using complementary elements, the level of a drive signal for signal selection is reduced and the reliability of the device is improved.

〔従来の技術〕[Conventional technology]

例えば液晶表示素子を用いたアクティブマトリクス型の
ディスプレイ装置が種々提案されている。
For example, various active matrix display devices using liquid crystal display elements have been proposed.

すなわち第5図はその一例の要部の構成を示し、例えば
画像データ信号が1画素期間ごとに順次供給される水平
画素数分のデータ信号線Djと、1水平期間ごとに順次
駆動パルス信号が供給される走査線数分のアドレス信号
線Aiとが直交して設けられ、これらの各交点にダート
がアドレス信号線Afに接続されたMO8選択素子Mi
jが設けられ、データ信号線DJがこのMO8素子Mi
jのソースドレインを介して液晶表示素子C1jの一端
に接続される。なお液晶素子C1jの他端は共通のター
グツト端子Tに接続される。
That is, FIG. 5 shows the configuration of the main part of an example, and includes, for example, data signal lines Dj for the number of horizontal pixels to which image data signals are sequentially supplied every pixel period, and drive pulse signals sequentially supplied every horizontal period. An MO8 selection element Mi is provided with address signal lines Ai as many as the number of scan lines to be supplied, and is provided perpendicularly to each other, and a dart is connected to the address signal line Af at each intersection point.
j is provided, and the data signal line DJ is connected to this MO8 element Mi.
It is connected to one end of the liquid crystal display element C1j via the source and drain of C1j. Note that the other end of the liquid crystal element C1j is connected to a common target terminal T.

従ってこの装置において、任意のアドレス信号線Aj 
K駆動(パルス)信号が供給されると、この信号線にデ
ートの接続された選択素子Mijが導通され、データ信
号線Dj K順次供給される画像データが順次液晶素子
Cijに供給される。これによっていわゆる面走査され
た画像データがマ)IJラックス状配された液晶素子C
ijにて表示される。
Therefore, in this device, any address signal line Aj
When the K drive (pulse) signal is supplied, the selection element Mij whose date is connected to this signal line becomes conductive, and the image data sequentially supplied to the data signal line Dj K is sequentially supplied to the liquid crystal element Cij. As a result, so-called surface-scanned image data is transferred to the liquid crystal elements C arranged in an IJ rack pattern.
Displayed at ij.

ところでこの装置において、例えば液晶表示素子を駆動
する場合には、液晶の劣化等を防止する目的でいわゆる
交流駆動が行われる。すなわち第6図に示すように、例
えば1フイールド毎にデータ信号線Djに供給されるデ
ータ信号がターゲット端子Tの電位VTに対して反転さ
れる。
By the way, in this device, when driving a liquid crystal display element, for example, so-called AC driving is performed for the purpose of preventing deterioration of the liquid crystal. That is, as shown in FIG. 6, for example, the data signal supplied to the data signal line Dj for each field is inverted with respect to the potential VT of the target terminal T.

ところがその場合に、MO8素子Mij のダートに供
給される駆動信号は、遮断時にデータ信号の最低電位V
Stよシ低く、導通時にデータ信号の最高電位VS2か
らさらに素子のスレショルド電圧vth分以上高いレベ
ルが必要とされる。従ってこの駆動信号の振幅は l VS2− VSI l + vthとなシ、この信
号の供給されるMO8素子Mijのダート耐圧を極めて
大きくする必要があった。またそれによって装置の信頼
性が低下されてしまっていた。
However, in that case, the drive signal supplied to the dart of the MO8 element Mij is lower than the lowest potential V of the data signal at the time of interruption.
It is lower than St, and requires a level higher than the highest potential VS2 of the data signal by more than the threshold voltage vth of the element when conductive. Therefore, the amplitude of this drive signal is l VS2 - VSI l + vth, and it is necessary to make the dirt breakdown voltage of the MO8 element Mij to which this signal is supplied extremely large. Moreover, the reliability of the device has been reduced thereby.

さらに大レベルの駆動信号が用いられるためにいわゆる
クロックノイズによるラデイエーションの増加を生じ易
い。
Furthermore, since a high-level drive signal is used, radiation tends to increase due to so-called clock noise.

ま7’jMO8素子の遮断時のフィードスルーノイズに
よる信号の保持電位の低下が生じやすいためにダイナミ
ックレンジの低下やそれによる画像のコントラストの不
足等のおそれがあった。
Since the holding potential of the signal is likely to decrease due to feed-through noise when the MO8 element is cut off, there is a risk that the dynamic range will decrease and the contrast of the image will be insufficient due to this.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上述べたように従来の技術では、大レベルの駆動信号
を用いるために、信頼性の低下やラディエーションの増
加、ダイナミックレンジの低下を生じやすいなどの問題
点があった。
As described above, the conventional technology uses a large-level drive signal, which causes problems such as a decrease in reliability, an increase in radiation, and a tendency to decrease the dynamic range.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、垂直方向に延長されかつ平行に配設された複
数の第1の信号線Djと、水平方向に延長されかつ平行
に配設された複数の第2の信号線Aiとが設げられ、こ
れらの第1.第2の信号線の各交点にそれぞれ選択素子
Mijを介して画素電極Cijが設けられてなるディス
プレイ装置において、上記選択素子がそれぞれ1対の相
補型の素子NMij。
The present invention provides a plurality of first signal lines Dj extending in the vertical direction and arranged in parallel, and a plurality of second signal lines Ai extending in the horizontal direction and arranged in parallel. The first of these In a display device in which a pixel electrode Cij is provided at each intersection of the second signal line via a selection element Mij, each of the selection elements is a pair of complementary elements NMij.

PMijで形成されると共に、これらがそれぞれ逆極性
の駆動信号(AijQ)で駆動されるようにしたことを
特徴とするディスプレイ装置である。
This display device is characterized in that it is formed of PMij and is driven by drive signals (AijQ) of opposite polarity.

〔作用〕[Effect]

これkよれば、相補型の素子を用いて、入力信号の高電
位期間と低電位期間とがそれぞれ異なる型式の素子を通
じて選択されるようにしたことによって、これらの素子
に供給される駆動信号のレベルを入力信号の振幅に等し
い大きさまで低減することができる。
According to this method, complementary elements are used so that the high potential period and low potential period of an input signal are selected through different types of elements, thereby improving the drive signal supplied to these elements. The level can be reduced to an amount equal to the amplitude of the input signal.

〔実施例〕〔Example〕

第1図は配線図を示す。この図において、アドレス信号
線Aiが2本(Ai 、 ’に’i )ずつ設けられる
と共に、MO8選択素子MijがN型素子NMijとP
型素子PMijとの相補型の素子で構成され、これらの
素子NMijとPMijのダートがそれぞれ信号線Ai
とMとに接続される。そしてこれらの素子NMijとP
Mijとのソースドレイン間を通じてデータ信号線Dj
と液晶表示素子C1jの一端とが接続される。さらに液
晶素子C1jの他端は共通のターゲット端子Tに接続さ
れる。
FIG. 1 shows a wiring diagram. In this figure, two address signal lines Ai (Ai, ' and 'i) are provided, and an MO8 selection element Mij is connected to an N-type element NMij and P
The darts of these elements NMij and PMij are connected to the signal line Ai, respectively.
and M. And these elements NMij and P
The data signal line Dj is connected between the source and drain of Mij.
and one end of the liquid crystal display element C1j are connected. Further, the other end of the liquid crystal element C1j is connected to a common target terminal T.

そしてこの装置において、データ信号線Djに第2図A
K示すような信号が供給されていた場合に、アドレス信
号線hi、 側には同図B、Cに示すような互いに逆極
性の駆動信号を供給して、素子NMijとPMijとが
それぞれの)パルス期間に導通されるようKする。
In this device, the data signal line Dj is connected to the data signal line A shown in FIG.
When a signal as shown in K is being supplied, driving signals of opposite polarity as shown in B and C in the same figure are supplied to the address signal line hi, and elements NMij and PMij are connected to each other. K so that it is conductive during the pulse period.

従ってこの装置において、入力信号が各駆動信号のパル
ス期間に素子NMijとPMijとを通じて液晶素子C
1jに供給されると共に、入力信号の高電位期間にはP
型素子PMijが充分に導通し、低電位期間にはN型素
子NMijが充分に導通するので、それぞれの駆動信号
の振幅を入力信号の振幅lVS2  Vstl に等しくすることができる。
Therefore, in this device, the input signal passes through the elements NMij and PMij to the liquid crystal element C during the pulse period of each drive signal.
1j, and P during the high potential period of the input signal.
Since the type element PMij is sufficiently conductive and the N type element NMij is sufficiently conductive during the low potential period, the amplitude of each drive signal can be made equal to the amplitude lVS2 Vstl of the input signal.

また上述の装置において、入力信号の高電位期間(フィ
ールド)はP型素子PMij、低電位期間はN型素子N
Mijのみが導通すればよいので、各アドレス信号線A
iと石の駆動信号は波形図のり、Hに示すようにフィー
ルド毎に交互に供給するようにしてもよい。さらにこの
場合に、各駆動信号の波高レベルは図中に示すようK、
入力信号の高電位期間のペデスタルレベルをVS′2、
低電位期間のベテスタルレベルヲ”S’l 、P us
子PMijのスレショルド電圧をVthp、N型素子N
Mijのスレショルド電圧をVthNとして、それぞれ VS2− Vthp VB2 + vthN とすることもできる。
Furthermore, in the above device, the high potential period (field) of the input signal is the P-type element PMij, and the low potential period is the N-type element N.
Since only Mij needs to be conductive, each address signal line A
The drive signals for i and stone may be alternately supplied for each field as shown in the waveform diagram H. Furthermore, in this case, the wave height level of each drive signal is K, as shown in the figure.
The pedestal level during the high potential period of the input signal is VS'2,
Bestial level during low potential period ”S'l, P us
The threshold voltage of the child PMij is Vthp, and the N-type element N
It is also possible to set the threshold voltage of Mij to VthN and set them as VS2-VthpVB2+vthN, respectively.

こうして表示が行われるわけであるが、上述の装置によ
れば駆動信号のレベルを小さくすることができるので、
各選択素子のダート耐圧を大きくする必要がなく、装置
の信頼性が向上する。
Display is performed in this way, and since the level of the drive signal can be reduced with the above-mentioned device,
There is no need to increase the dart withstand voltage of each selection element, and the reliability of the device is improved.

またクロックノイズによるラデイエーションの発生が低
減され、特に波形図のB、Cの信号を用いた場合には駆
動信号同士が相殺されるので、ラデイエーションを略零
にすることができる。
Furthermore, the occurrence of radiation due to clock noise is reduced, and in particular when the signals B and C in the waveform diagram are used, the drive signals cancel each other out, so radiation can be reduced to approximately zero.

さらに第3図は具体的な回路ノRターンの構成例を示し
、図においてP型素子PMijとN型素子NMijがそ
れぞれデータ信号線DJと液晶表示素子C1jを構成す
る透明電極との間に設けられると共に、これらの素子P
MijとNMijの中央部に透明電極の上下に設けられ
たアドレス信号線Aiと鼾の延長部がそれぞれ設けられ
てダートが形成される。
Furthermore, FIG. 3 shows a specific example of the configuration of the circuit R-turn, and in the figure, a P-type element PMij and an N-type element NMij are respectively provided between the data signal line DJ and the transparent electrode constituting the liquid crystal display element C1j. and these elements P
At the center of Mij and NMij, address signal lines Ai and snoring extensions provided above and below the transparent electrodes are provided, respectively, to form darts.

従ってこの構成によれば、隣接するアドレス信号線間で
逆極性の駆動信号が流されるので、各透明電極へのクロ
ックノイズの飛込みが中和され、ダイナミックレンジの
低下が防止される。
Therefore, according to this configuration, drive signals of opposite polarity are passed between adjacent address signal lines, so that clock noise entering each transparent electrode is neutralized and a reduction in dynamic range is prevented.

なお第4図は選択素子の構成の他の例を示すものであっ
て、Aはいわゆるダブルゲートとした場合で、特にデー
タ信号線Djと液晶表示素子Cij間の電荷の漏洩を低
減させることができる。またBはダブルゲートの中点を
互に接続したものであって、上述と同様に漏洩が低減さ
れると共に、特に製造工程中のラビング処理等による静
電気の発生に対する強度を向上させることができる。
Note that FIG. 4 shows another example of the configuration of the selection element, where A is a so-called double gate, which is particularly effective in reducing charge leakage between the data signal line Dj and the liquid crystal display element Cij. can. Further, B is a structure in which the midpoints of the double gates are connected to each other, which reduces leakage as described above, and improves strength particularly against the generation of static electricity due to rubbing treatment during the manufacturing process.

なお、この装置はポリシリコン、アモルファスシリコン
、クリスタルシリコン等の全てのMO8素子を用いた装
置に適用できる。
Note that this device is applicable to devices using all MO8 elements such as polysilicon, amorphous silicon, and crystal silicon.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、相補型の素子を用いて、入力信号の
高電位期間と低電位期間とがそれぞれ異なる型式の素子
を通じて選択されるようにしたことによって、これらの
素子に供給される駆動信号のレベルを入力信号の振幅に
等しい大きさまで低減することができるようになった。
According to the present invention, by using complementary elements, the high potential period and the low potential period of the input signal are selected through different types of elements, so that the drive signal supplied to these elements is It is now possible to reduce the level of the input signal to a magnitude equal to the amplitude of the input signal.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一例の配線図、第2図〜第4図はその
説明のための図、第5図、第6図は従来の装置の説明の
ための図である。 DJはデータ信号線、Aiはアドレス信号線、NMij
はN型素子、PMijはP型素子、Cijは液晶表示素
子、Tはターゲット端子である。
FIG. 1 is a wiring diagram of an example of the present invention, FIGS. 2 to 4 are diagrams for explaining the same, and FIGS. 5 and 6 are diagrams for explaining a conventional device. DJ is a data signal line, Ai is an address signal line, NMij
is an N-type element, PMij is a P-type element, Cij is a liquid crystal display element, and T is a target terminal.

Claims (1)

【特許請求の範囲】 垂直方向に延長されかつ平行に配設された複数の第1の
信号線と、水平方向に延長されかつ平行に配設された複
数の第2の信号線とが設けられ、これらの第1、第2の
信号線の各交点にそれぞれ選択素子を介して画素電極が
設けられてなるディスプレイ装置において、上記選択素
子がそれぞれ1対の相補型の素子で形成されると共に、 これらがそれぞれ逆極性の駆動信号で駆動されるように
したことを特徴とするディスプレイ装置。
[Claims] A plurality of first signal lines extending in the vertical direction and arranged in parallel and a plurality of second signal lines extending in the horizontal direction and arranged in parallel are provided. In a display device in which a pixel electrode is provided at each intersection of these first and second signal lines via a selection element, each of the selection elements is formed of a pair of complementary elements, and A display device characterized in that these are each driven by drive signals of opposite polarity.
JP61227362A 1986-09-26 1986-09-26 Display device Expired - Fee Related JPH07112259B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61227362A JPH07112259B2 (en) 1986-09-26 1986-09-26 Display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61227362A JPH07112259B2 (en) 1986-09-26 1986-09-26 Display device

Publications (2)

Publication Number Publication Date
JPS6382177A true JPS6382177A (en) 1988-04-12
JPH07112259B2 JPH07112259B2 (en) 1995-11-29

Family

ID=16859608

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61227362A Expired - Fee Related JPH07112259B2 (en) 1986-09-26 1986-09-26 Display device

Country Status (1)

Country Link
JP (1) JPH07112259B2 (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0456453A2 (en) * 1990-05-07 1991-11-13 Fujitsu Limited High quality active matrix-type display device
EP0486284A2 (en) * 1990-11-13 1992-05-20 Sel Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
EP0488643A2 (en) * 1990-11-26 1992-06-03 Sel Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
EP0499979A2 (en) * 1991-02-16 1992-08-26 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
EP0506027A2 (en) * 1991-03-26 1992-09-30 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for driving the same
US5351145A (en) * 1991-01-14 1994-09-27 Matsushita Electric Industrial Co., Ltd. Active matrix substrate device and related method
US5956105A (en) * 1991-06-14 1999-09-21 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving the same
US6195139B1 (en) 1992-03-04 2001-02-27 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device
US6369788B1 (en) 1990-11-26 2002-04-09 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
US6753839B2 (en) 2000-12-14 2004-06-22 Seiko Epson Corporation Electro-optical panel and electronic device
US6778231B1 (en) 1991-06-14 2004-08-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical display device
US6893906B2 (en) 1990-11-26 2005-05-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
US6975296B1 (en) 1991-06-14 2005-12-13 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method of driving the same
US7154147B1 (en) 1990-11-26 2006-12-26 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
JP2009198981A (en) * 2008-02-25 2009-09-03 Seiko Epson Corp Driving circuit of electrooptical device, driving method of electrooptical device, electrooptical device and electronic apparatus

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6011532A (en) * 1990-05-07 2000-01-04 Fujitsu Limited High quality active matrix-type display device
US5515072A (en) * 1990-05-07 1996-05-07 Fujitsu Limited High quality active matrix-type display device
US5432527A (en) * 1990-05-07 1995-07-11 Fujitsu Limited High quality active matrix-type display device
EP0456453A2 (en) * 1990-05-07 1991-11-13 Fujitsu Limited High quality active matrix-type display device
EP0486284A3 (en) * 1990-11-13 1993-09-01 Sel Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
EP0486284A2 (en) * 1990-11-13 1992-05-20 Sel Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
US7462515B2 (en) 1990-11-13 2008-12-09 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
EP0488643A3 (en) * 1990-11-26 1993-05-12 Semiconductor Energy Lab Electro-optical device and driving method for the same
EP0488643A2 (en) * 1990-11-26 1992-06-03 Sel Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
US7154147B1 (en) 1990-11-26 2006-12-26 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
US6893906B2 (en) 1990-11-26 2005-05-17 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
US6369788B1 (en) 1990-11-26 2002-04-09 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and driving method for the same
US5351145A (en) * 1991-01-14 1994-09-27 Matsushita Electric Industrial Co., Ltd. Active matrix substrate device and related method
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