JPS6382133A - Reception electric field intensity setting circuit for diversity receiver - Google Patents

Reception electric field intensity setting circuit for diversity receiver

Info

Publication number
JPS6382133A
JPS6382133A JP61228583A JP22858386A JPS6382133A JP S6382133 A JPS6382133 A JP S6382133A JP 61228583 A JP61228583 A JP 61228583A JP 22858386 A JP22858386 A JP 22858386A JP S6382133 A JPS6382133 A JP S6382133A
Authority
JP
Japan
Prior art keywords
electric field
circuit
current
field intensity
field strength
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP61228583A
Other languages
Japanese (ja)
Other versions
JPH0795717B2 (en
Inventor
Katsuharu Kimura
克治 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61228583A priority Critical patent/JPH0795717B2/en
Publication of JPS6382133A publication Critical patent/JPS6382133A/en
Publication of JPH0795717B2 publication Critical patent/JPH0795717B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To easily set a reception electric field intensity detecting voltage with a simple circuit by adding a current mirror circuit using a variable resistor to set a current and an inclination to each electric field level circuit. CONSTITUTION:Gates of transistors (TRs) Q1, Q2 are connected in common and emitters are connected to a power supply or ground to constitute a current mirror circuit. The current Iv of the current mirror circuit is set by using a variable resistor RV1 and a variable resistor RV2 sets the inclination of a reception voltage intensity detecting voltage V0 with respect to a received electric field strength VIN. Thus, in giving the signals of the same level to antennas 11, 21 in a diversity receiver comprised of two receivers having a function outputting or inputting the received electric field intensity in terms of a DC current, the input voltage to a comparator 2 is sent to the same level by employing the circuit as above for received electric field intensity setting circuits 19, 29.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は受信機の電界検出を行うためのダイバーシィテ
ィ受信機の受信電界強度設定回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a receiving electric field strength setting circuit of a diversity receiver for detecting an electric field of the receiver.

〔従来の技術〕[Conventional technology]

従来、この種の受信電界強度設定方法は中間周波(IP
)部で受信信号キャリア成分を整流検波するために、ア
ンテナ端からIF入力咳での全利得を高周波減衰器など
を用いて設定していた。
Conventionally, this type of reception field strength setting method has been used for intermediate frequency (IP
) In order to rectify and detect the received signal carrier component, the total gain at the IF input from the antenna end was set using a high-frequency attenuator or the like.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の受信電界強度設定方法は、IP信号路に
可変減衰器(アッテネータ)あるいは可変利得増幅器を
挿入するために回路構成が複数になるという欠点があっ
た。
The conventional reception field strength setting method described above has the disadvantage that a plurality of circuit configurations are required because a variable attenuator or variable gain amplifier is inserted into the IP signal path.

本発明の目的は、このような問題点を解決し、簡単な回
路で設定が容易にできるダイパーシティ受信採用受信電
界強度設定回路を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve these problems and provide a reception field strength setting circuit employing diversity reception that can be easily set using a simple circuit.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の構成は、それぞれ受信電界強度に対応した直流
電流を出力あるいは入力する電界レベル回路を有する2
系統の受信機を含むダイバーシィティ受信機用受信電界
強度設定回路において、前記名電界レベル回路にそれぞ
れ可変抵抗器によって電流および傾斜の設定されるカレ
ントミラー回路を付加したことを特徴とする。
The configuration of the present invention includes two electric field level circuits that each output or input a direct current corresponding to the received electric field strength.
The received field strength setting circuit for a diversity receiver including a system receiver is characterized in that a current mirror circuit whose current and slope are set by variable resistors is added to each of the above-mentioned field level circuits.

〔実施例〕〔Example〕

次に図面により本発明の詳細な説明する。 Next, the present invention will be explained in detail with reference to the drawings.

第1図は本発明の一実施例を含むダイバーシィティ受信
機のブロック図である。このダイバーシィティ受信機は
、自動車電話などに用いられるもので、2系統のアンテ
ナ11,1.2と、高周波増幅器(RF  AMP)1
2.22と、高周波帯域通過ろ波器(R,F  BPF
)1.3.23と、ローカルオシレータ1からの信号を
混合するミキサ14.24、IF  BPF  15,
25、中間周波増幅器(IF  AMP)16.26と
、ディスクリミネータ17.27と、受信電界強度指示
部(RS S I : Rereived Signa
l Strength Tndicator)1.8.
28と、受信電界強度設定回路19.29とを備え、各
電界強度設定回路19.29の出力はコンパレータ2で
比較され、信号レベルの大の方の信号を(RF)スイッ
チ3で選び、音声増幅器4を介してスピーカ5に出力さ
れる。
FIG. 1 is a block diagram of a diversity receiver including one embodiment of the present invention. This diversity receiver is used for car phones, etc., and has two systems of antennas 11 and 1.2, and a radio frequency amplifier (RF AMP) 1.
2.22 and high frequency band pass filter (R,F BPF
) 1.3.23 and a mixer 14.24 that mixes the signal from local oscillator 1, IF BPF 15,
25, intermediate frequency amplifier (IF AMP) 16.26, discriminator 17.27, and received field strength indicator (RSSI)
l Strength Tndicator) 1.8.
28 and reception field strength setting circuits 19 and 29, the outputs of each field strength setting circuit 19 and 29 are compared by a comparator 2, and the signal with the higher signal level is selected by the (RF) switch 3 and the signal is It is output to the speaker 5 via the amplifier 4.

この場合、R35I  18.28として自動車電話に
用いられている回路は、IF  AMP  ]6.26
の出力レベルに従った対数増幅器を用いており、電流出
力が得られるようになっている。
In this case, the circuit used in the car phone as R35I 18.28 is IF AMP ]6.26
It uses a logarithmic amplifier according to the output level of the current output.

そのため、本実施例の受信電界強度設定回路19゜20
としては、第2図(a、 )〜(d)に示すようなカレ
ントミラー回路が用いられるのが適切である。
Therefore, the received electric field strength setting circuit 19°20 of this embodiment
As such, it is appropriate to use current mirror circuits as shown in FIGS. 2(a, 2) to 2(d).

第2図(a、)、(b)は各R,SSI  1−8.2
8から受信電界強度VINに対応した直流電流10を入
力する場合の回路、第2図(c)、(d)は受信電界強
度VINに対応した直流電流を1゜を出力する場合の回
路の各側を示している。これらの図中各トランジスタQ
l、Q2はゲートが共通接続され、エミッタが電源VC
Cあるいは接地と接触されてカレントミラー回路を構成
している。可変抵抗RV、によりこのカレントミラー回
路の電流Ivが設定され、可変抵抗RV2により受信電
圧強度検出電圧■oの受信電界強度VINに対する傾き
を設定できるようになっている。
Figure 2 (a,) and (b) each R, SSI 1-8.2
Figures 2(c) and 2(d) show the circuits when inputting a DC current 10 corresponding to the received field strength VIN from 8 to 8, and the circuits shown in Figs. Showing the side. Each transistor Q in these figures
l, Q2 have their gates connected in common, and their emitters connected to the power supply VC.
C or ground to form a current mirror circuit. The current Iv of this current mirror circuit is set by the variable resistor RV, and the slope of the received voltage strength detection voltage 2o with respect to the received electric field strength VIN can be set by the variable resistor RV2.

この場合、受信電界強度VINに対する受信電圧強度検
出電圧voは次のように示される。
In this case, the received voltage strength detection voltage vo with respect to the received electric field strength VIN is expressed as follows.

(1)受信電界強度VTNに対応した直流電流■。(1) Direct current ■ corresponding to received field strength VTN.

を入力し、トランジスタQl、Q2の電位■9とすると
、第2図(a>、(b)に対して、それぞれ(+> 、
 (2)式のように示される。
, and the potentials of transistors Ql and Q2 are 9, respectively (+>,
It is shown as equation (2).

Vo =Vcc  RV2  (I o  I v )
  −(1)Vo =Vcc  RV2  (TO+ 
IV )  ・・・(2)(2)受信電界強度VINに
対応した直流電流■。
Vo = Vcc RV2 (I o I v )
-(1) Vo = Vcc RV2 (TO+
IV) ... (2) (2) Direct current ■ corresponding to received electric field strength VIN.

を出力する場合、第2図(c)、(d)に対してそれぞ
れ(3) 、 (4>式に示される。
When outputting , it is shown in equations (3) and (4> for FIG. 2(c) and (d), respectively).

Vo =RV2(T o  I v )     −(
3)Vo =R■2  (I o + I v )  
   −(4)これらの各式(1)〜(4)は第3図(
a)、(b)の特性図に示すように、受信電界強度VI
Nに対して受信電界強度検出電圧■oを任意に設定出来
ることがわかる。
Vo = RV2(T o I v ) −(
3) Vo = R■2 (I o + I v )
-(4) These equations (1) to (4) are shown in Figure 3 (
As shown in the characteristic diagrams a) and (b), the received electric field strength VI
It can be seen that the received field strength detection voltage ■o can be arbitrarily set for N.

従って、受信電界強度を直流電流で出力あるいは入力す
る機能を持つ2つの受信機がち構成されるダイバーシィ
ティ受信器において、アンテナ11.21にそれぞれ同
一レベルの信号を入力したときに受信電界強度設定回路
19.29を第2図に示す回路を用いることにより、コ
ンパレータ2の入力電圧を同一レベルに設定出来る。
Therefore, in a diversity receiver consisting of two receivers each having the function of outputting or inputting the received electric field strength as a direct current, the received electric field strength is set when the same level of signal is input to the antennas 11 and 21. By using the circuits 19 and 29 shown in FIG. 2, the input voltages of the comparator 2 can be set to the same level.

なお、本実施例は、カレントミラー回路をバイポーラト
ランジスタで構成した例を示したが、C−MOS)ラン
ジスタを用いても同様となることは明らかである。
Although this embodiment has shown an example in which the current mirror circuit is configured with bipolar transistors, it is clear that the same effect can be achieved even if a C-MOS (C-MOS) transistor is used.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、受信電界強度に対応した
直流電流を出力あるいは入力する回路をそれぞれ持つ2
つの受信器からなるダイバーシィティ受信器にそれぞれ
カレントミラー回路を付加することにより、簡単な回路
で受信電界強度検出電圧を容易に設定できる効果がある
As explained above, the present invention provides two
By adding a current mirror circuit to each diversity receiver consisting of two receivers, it is possible to easily set the received field strength detection voltage with a simple circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を含むダイバーシィティ受信
機のブロック図、第2図(a)〜(d)は第1図の受信
電界強度設定回路1.9.20の4つの例を示す回路図
、第3図(a>、(b)は第2図(a)〜(d)の入力
電界レベル■夏N対出力電圧■。の各特性を説明する特
性図である。 1・・・ローカルオシレータ、2・・・コンパレータ、
3・・・スイッチ、4・・・AF  AMP、5・・・
スピーカ、]、]、、21・・・アンテナ、12.22
・・・RF  AMP、13.23・・・RF  BP
F、14.24・・・ミキサ、15.25・・・IF 
 BPF、16.26・・・IF  AMP、17.2
7・・・ディスクリミネータ、18.28・・・R35
I、1.9.29・・・受信電界強度設定回路、Ql、
Q2・・・l・ランジスタ、RV、、RV2・・・可変
抵抗器。 7一 (C) 箭 (しり (d〕 Z回
FIG. 1 is a block diagram of a diversity receiver including an embodiment of the present invention, and FIGS. 2(a) to (d) are four examples of the received field strength setting circuit 1, 9, and 20 of FIG. 1. 3 (a>, (b) are characteristic diagrams illustrating each characteristic of the input electric field level (summer N vs. output voltage) shown in FIGS. 2 (a) to (d). 1 ...Local oscillator, 2...Comparator,
3...Switch, 4...AF AMP, 5...
Speaker, ], ],, 21... Antenna, 12.22
...RF AMP, 13.23...RF BP
F, 14.24...Mixer, 15.25...IF
BPF, 16.26...IF AMP, 17.2
7...Discriminator, 18.28...R35
I, 1.9.29... Reception field strength setting circuit, Ql,
Q2...l transistor, RV,, RV2... variable resistor. 71 (C) Shiri (d) Z times

Claims (1)

【特許請求の範囲】[Claims] それぞれ受信電界強度に対応した直流電流を出力あるい
は入力する電界レベル回路を有する2系統の受信機を含
むダイバーシィティ受信機用受信電界設定回路において
、前記各電界レベル回路にそれぞれ可変抵抗器によって
電流および傾斜の設定されるカレントミラー回路を付加
したことを特徴とするダイバーシィティ受信器用受信電
界強度設定回路。
In a receiving electric field setting circuit for a diversity receiver including two systems of receivers each having an electric field level circuit that outputs or inputs a DC current corresponding to the received electric field strength, a current is applied to each electric field level circuit by a variable resistor. 1. A receiving field strength setting circuit for a diversity receiver, characterized in that a current mirror circuit whose slope is set is added.
JP61228583A 1986-09-26 1986-09-26 Received field strength setting circuit for diversity receiver Expired - Lifetime JPH0795717B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61228583A JPH0795717B2 (en) 1986-09-26 1986-09-26 Received field strength setting circuit for diversity receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61228583A JPH0795717B2 (en) 1986-09-26 1986-09-26 Received field strength setting circuit for diversity receiver

Publications (2)

Publication Number Publication Date
JPS6382133A true JPS6382133A (en) 1988-04-12
JPH0795717B2 JPH0795717B2 (en) 1995-10-11

Family

ID=16878637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61228583A Expired - Lifetime JPH0795717B2 (en) 1986-09-26 1986-09-26 Received field strength setting circuit for diversity receiver

Country Status (1)

Country Link
JP (1) JPH0795717B2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125724A (en) * 1985-11-26 1987-06-08 Toshiba Corp Diversity reception equipment

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62125724A (en) * 1985-11-26 1987-06-08 Toshiba Corp Diversity reception equipment

Also Published As

Publication number Publication date
JPH0795717B2 (en) 1995-10-11

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