JPS6381694U - - Google Patents
Info
- Publication number
- JPS6381694U JPS6381694U JP17265086U JP17265086U JPS6381694U JP S6381694 U JPS6381694 U JP S6381694U JP 17265086 U JP17265086 U JP 17265086U JP 17265086 U JP17265086 U JP 17265086U JP S6381694 U JPS6381694 U JP S6381694U
- Authority
- JP
- Japan
- Prior art keywords
- integrator
- output signal
- pulse width
- conversion device
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 3
- 238000003079 width control Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 238000004804 winding Methods 0.000 description 1
Description
第１図は本考案の一実施例の回路図、第２図は
本考案の動作原理説明図、第３図は第１図の制御
信号の動作波形図、第４図は本考案の回路構成ブ
ロツク図である。
１〜４……ダイオード、５……コンデンサ、６
……変圧器、７……スイツチング素子、８……ダ
イオード、９……リアクトル、１０……コンデン
サ、１１……定電圧制御回路、２１……変圧器６
の２次巻線、２２，２９……ダイオード、２３，
３１……コンデンサ、２６，２８，３０……抵抗
器、２７……トランジスタ、３２……演算増幅器
、３３……比較器。
Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is an explanatory diagram of the operating principle of the present invention, Fig. 3 is an operation waveform diagram of the control signal of Fig. 1, and Fig. 4 is the circuit configuration of the present invention. It is a block diagram. 1 to 4...Diode, 5...Capacitor, 6
...Transformer, 7 ... Switching element, 8 ... Diode, 9 ... Reactor, 10 ... Capacitor, 11 ... Constant voltage control circuit, 21 ... Transformer 6
secondary winding, 22, 29...diode, 23,
31... Capacitor, 26, 28, 30... Resistor, 27... Transistor, 32... Operational amplifier, 33... Comparator.
Claims (1)
置に於いて、主回路の直流電圧若くはこの電圧に
対応する電圧と、スイツチング素子制御用のパル
ス幅制御信号との積を作る信号変換器と、この変
換器出力信号を積分する積分器と積分器出力信号
を設定値と比較する比較器とから成り、前記積分
器の出力信号が、予め設定された設定値に達した
時に変化する比較器出力信号によりパルス幅制御
信号を変換装置の出力電力が減少する様に制御回
路を構成した事を特徴とする変換装置。 A conversion device that controls the pulse width of a switching element includes a signal converter that multiplies the DC voltage of the main circuit or a voltage corresponding to this voltage and a pulse width control signal for controlling the switching element; It consists of an integrator that integrates the integrator output signal and a comparator that compares the integrator output signal with a set value, and the comparator output signal changes when the output signal of the integrator reaches a preset set value. A conversion device characterized in that a control circuit is configured to reduce the output power of the conversion device based on a pulse width control signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17265086U JPS6381694U (en) | 1986-11-12 | 1986-11-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17265086U JPS6381694U (en) | 1986-11-12 | 1986-11-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6381694U true JPS6381694U (en) | 1988-05-30 |
Family
ID=31109380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17265086U Pending JPS6381694U (en) | 1986-11-12 | 1986-11-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6381694U (en) |
-
1986
- 1986-11-12 JP JP17265086U patent/JPS6381694U/ja active Pending