JPS6375859A - Method for connecting data processor - Google Patents

Abstract

PURPOSE:To check the mounting condition of each peripheral circuit without especially determining an address number by successively transmitting a command signal to respective lines of a bus and transmitting a response signal when the command signal is received through contact pieces of a specific order. CONSTITUTION:When an ID request signal is successively transmitted to contact pieces X<1>-X<7> of a connector 42 from a control part, it is successively given to peripheral circuits mounted on connectors 425-421 through contact pieces Y8 of connectors 425-421. If the peripheral circuit which receives the ID request signal transmits an ID code peculiar to the peripheral circuit itself through contact pieces Y8 of connectors, the control part receives this ID code to confirm that the peripheral circuit is mounted, and the control part designates the peripheral circuit by similar procedures.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for interconnecting circuits constituting a data processing device.

[Conventional technology]

In general, a data processing device consists of a control unit with arithmetic processing functions and various peripheral circuits.The functions and required number of circuits of each peripheral circuit are selected according to the operating conditions, and the overall combination is determined. It is preferable to unitize the connectors, make them detachable using connectors, and connect the connectors to each other through a common bus bar.

In addition, data exchange between each circuit is based on the initiative of the control unit, and a unique address number is determined for each valley peripheral circuit, and the control unit sends out a command signal with an address number added. The peripheral circuit that has been specified its own address number will respond accordingly.When mounting the peripheral circuit unit on the connector, the setting of this address number is done by using the dip switch etc. installed in the unit. It is said that this is done artificially according to a predetermined order.

[The problem that the invention aims to address]

However, since the address numbers are set manually, it is easy to make mistakes in the settings, and if an unplanned number is set, the control unit will determine that the unit with the address number that should have been set is not installed, and the address If duplicate numbers are set, a plurality of peripheral circuits will respond at the same time, causing confusion in the judgment of the control section and causing a problem in which the entire device does not operate normally.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention is constructed by the following means.

That is, in the data processing device described above, the valley lines constituting the busbar are sequentially shifted and connected by a predetermined number in a predetermined direction according to the arrangement order of each peripheral circuit from the control unit, and each peripheral circuit is connected as viewed from a predetermined direction. The line with the final rank is connected to the contact piece of the connector with a specific rank.

[For production]

Therefore, the contact pieces of the respective connectors corresponding to the peripheral circuit units form the busbars according to the arrangement order from the control unit '2! Only one of the RA is connected, and the control unit sequentially sends command signals to the bus line, and each peripheral circuit receives the command signal through a contact piece of a specific order. If a response signal is sent in response to this, it is possible to check the mounting status of each peripheral circuit and to exchange data between the control section and each peripheral circuit without specifying an address number.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to figures showing examples.

Figure 2 shows the external appearance of the connection connector;
B) is a side view, and (C) is a bottom view, in which a plurality of jack-shaped contact pieces 3 are arranged inside one side 2 of the main body 1, and through holes 4 corresponding to the contact pieces 3 are formed. A first plug part 6 having a protrusion part 5 bored laterally is provided, and a plurality of pin-shaped contact pieces 8 are arranged to protrude from the other side 7 on the opposite side. , a recess 9 is formed in which these are housed and can be freely fitted with the protrusion 5, and a second plug part 10 is constituted by these.

Further, on the upper surface 13 of the main body 1, including the surface that differs from the - side 2 and the other side T, a plurality of bottle-shaped contact pieces 14 are arranged to protrude, similar to the second plug part 10. There are eight walls 15 surrounding the recess, and a third plug portion 16 is constructed by these walls.

In addition, a protruding piece 18 having elasticity is formed on the lower surface 17 of the main body 1 to be fixed to a panel or the like.

FIG. 3 is an enlarged view of the X-Y cross section in FIG.
Conductor 21 connecting contact pieces 3 and 8 and contact piece 3
A conductor 22 is provided to connect between the contact pieces 3.8. 8.14
In addition, the support portions of the conductors 21, 22, and the protruding portions 5 are made of an insulating material.

FIG. 4 is an internal connection diagram showing the connection status between each contact piece. The contact piece 8 side is shown as It constitutes the address bus line, and also
8 Configure the data bus line, X9 to 2280
The % wires, including Y9 to Y28, are connected to each other by conductors 21 and 22, while the wires from Xl to z8 are connected with the X1 to X7 side as a reference. 22
~z8 are shifted one by one from a low rank to a high rank as a predetermined number in a certain direction, and the conductor group 31 made up of the conductor 21 connects each of X1 to X7 and z2 to z8, and in the same manner as described above. Y8 is the final ranking when viewed from a certain direction.
and z8 are connected by a conductor 22.

FIG. 5 shows the state in which the connectors shown in FIGS. 2 to 4 are mounted on a flat panel, where (4) is a front view and (B) is a side view. , the first of the connectors 42s to 42n that are in contact with each other
The second plug part 6 and the second plug part 10 are fitted together, and the leftmost connector 42+ is connected to the plug part 10 by a connector with a cable (not shown in the figure) or directly. While connecting the control unit, if a unit having a compatible connector and housing a peripheral circuit is placed in the third plug part 16 of each connector 421 to 42n, the system can be connected as shown in FIG. Each peripheral circuit and the control section are commonly connected via each bus bar.

Incidentally, each of the connectors 421 to 42n is fixed to the spring/I/41 in the following manner.

That is, the υ locking portions 43 are cut and raised at portions corresponding to both upper and lower sides of each of the connectors 421 to 42n of the panel 41.
1 to 43nq 44s to 44n are formed to face each other, and their tips 45 are bent in a direction to clamp the connectors 421 to 42n, and the connector 421 is inserted between the engaging parts 431 to 43n and 441 to 44n. 42n from the direction along the surface of the panel 41, the protruding piece 18
Due to the elasticity of the connectors 421 to 42n, the engaging parts 431 to
43ns44s to 44n from the inside to the tip 45,
This will make it fixed.

On the other hand, due to the connection shown in FIG. 4, the connection of the address bus bar to the contact piece Y8 is shifted for each connector 421 to 42n, so that the address busbar is as shown in FIG.

FIG. 1 shows a general connection by connectors 421 to 42g, and contact pieces X1 to X1 to which the control section of connector 421 is connected.
From X7, the connections are sequentially shifted one by one from the low order to the high order of the contact pieces 22 to z8 according to the arrangement order of the connectors 421 to 42g9, and the contact pieces in these connection lines The final rank up to z8 is connected to the contact piece Y8 of the specific rank of each connector 421-42s.

Therefore, the contact pieces X7 to X3 of the connector 421 have
Only the contact piece Y8 of the connectors 421 to 42m is connected to each one, and if similar connectors 426 and 427 are further connected to the right side by the connector 42s, the contact piece X2 of the connector 421. XL has connectors of 42g and 42t each.
It will be connected only to the contact piece Y8.

Therefore, for the contact pieces X1 to X7 of the connector 421,
From the control unit, 10 (Identification)
n,) When the request signal is sent, this connects to the connector 42s~
Connectors 42s to 42! through each contact piece Y8 of 42s!
If the peripheral circuit that receives the ID request signal transmits its unique ID code to itself via the contact piece Y8 of the connector, the reception of the ID code is In addition to being able to confirm the implementation of the peripheral circuit, the peripheral circuit can also be designated by the same method.

FIG. 6 shows a block diagram of a data processing device configured with the above connections, and the contact pieces X1 to X7 to z in FIG.
2 to z8, and a data bus line 52 to contact pieces X9 to X28 to z9 to Z28 in the figure.
In contrast, processors such as microprocessors (hereinafter referred to as C
PU) and a control unit (hereinafter referred to as CNT) consisting of memory, etc.
) 53, and an interface as a peripheral circuit (
Hereinafter, I/F) 541 to 54n are the connectors 42 in FIG.
It is detachably connected to 1 to 42n, r,
Analog input circuits, analog output circuits, digital input circuits, digital output circuits, transmission line transmitting/receiving circuits, etc. are selected for each of the r 541 to 54n according to conditions, and the required number of each is mounted.

In this case, the CPU in the CNT 53 executes instructions in the memory, checks the implementation status of each I/F' 54t to 54n, takes in each data via the I/F' 54t to 54n, and performs arithmetic processing and judgment based on this. , Send data to I/Fs 5jh to 54n according to this result, etc.
It controls devices connected to the I/Fs 54t to 54n, and performs data transmission and reception with other devices via transmission paths.

The seventh output is the valley I/F 541 by the CPU in CNT53.
This is a flowchart showing the mounting status check operation of ~54n, in which the initial state of each part is set by "Initialize" 101, and after "Unit Mounting Check Mode Sera) J102 is performed, I/F5 to the CPU is set.
A counter configured to count the number of ts to 54n is set by "l=1" 103, and an IDi request signal/transmission J Ill is performed to "Xl" of the address bus,
rID code/reception from the corresponding I/Fi in response to this? If J112 becomes Y (YgS), perform ``r/Fi mounting information/memory storage'' 121, and the count value of the counter becomes ri=n? Check J, this is N (No)
During this period, a counter is registered according to ri=i+tJ123, and after repeating step 111, step 122
In response to becoming Y, "unit mounting check mode reset" 131 is performed.

Regarding the above, when step 112 is N, step 12
1 is not executed, and the process immediately moves to step 122.

Therefore, without using any particular address number, valley I
/F54t to F54n can be determined based on the contents of the memory corresponding to step 121, and the contact piece
~Each I/F 541 to 54 for signal transmission via X7
You can freely specify n, υ, f/F 541~
In addition, it is possible to omit the trouble of setting address numbers when installing the 54n, and at the same time, it is possible to completely eliminate abnormalities in the data processing situation due to incorrect setting of address numbers.

By using the connectors 421 to 42n, expansion is easy and optional, and expandability of the device increases.

However, the number of contact pieces XI to X7 to Zl-Z8 used for the address bus line 51 may be determined according to the conditions, and the same can be said even if the number of contact pieces to shift the connections between them is plural. What is necessary is to determine the specific order of the contact piece Y8.

In addition, various modifications can be made, such as using ordinary connectors to mount the units and making connections between them in the same manner as shown in Fig. 1. [Effects of the Invention] According to the above explanation, Obvious Advantages According to the present invention, each peripheral circuit can be specified individually without using an address number, so the effort required to set an address number can be omitted, and abnormalities can occur due to incorrect setting of an address number. Aiming is completely achieved, and remarkable effects can be obtained in various data processing devices.

[Brief explanation of the drawing]

The figures show an embodiment of the present invention, with Figure 1 being a general connection diagram and Figure 2 being a general connection diagram.
The figures are external views of the connector used for connection, ■ is a front view, (B) is a side view, (C) is a bottom view, Figure 3 is an enlarged view of the x-y cross section in Figure 2, and Figure 4 is an enlarged view of the x-y cross section in Figure 2. The figure is an internal connection diagram, Figure 5 shows the mounting situation, ■ is a front view, ω) is a side view, Figure 6 is a block diagram of the device configured with the connections shown in Figure 1, and Figure 7 is a flowchart of the implementation status check operation. 1... Main body, 2... Fist - side, 3,8°14...
...Contact piece, 6...First connection part, 10...Second connection part, 16...-Third connection part, 21, 22.
...Conductor, 31...Conductor group, 421-42n...
萐・Connector, 51---・Address bus bar, 52...
--Data bus line, 53--- @CNT (control unit),
541-54n ・φ...I/F (Interface).

Claims (1)

[Claims] A data processing device in which a control unit and a plurality of peripheral circuits are removably connected via connectors provided for each of the peripheral circuits and commonly connected by a bus bar, and data is exchanged between the control unit and the plurality of peripheral circuits under the control of the control unit. In this step, each line constituting the bus bar is sequentially shifted and connected by a predetermined number in a predetermined direction according to the arrangement order of each peripheral circuit from the control unit, and the final order of each peripheral circuit as viewed from the predetermined direction is determined for each peripheral circuit. A method for connecting a data processing device, characterized in that a wire is connected to a contact piece of a specific order among the contact pieces of the connector.