JPS637497B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a line current supply method applied when supplying line current from the exchange side to various terminal devices such as telephones. The subscriber circuit of an exchange to which terminal equipment that requires line current supply is connected has line current supply (Battery feed.), over voltage protection (Over voltage protection)
Functions such as protection.), ringing signal transmission (Ringing.), monitoring (Supervision.), 2-wire 4-wire conversion (Hybrid.), testing (Test.), and encoding (Coding.) are required. It is called the BORSCHT function by its initials, but most of it is implemented in the trunk circuit of the exchange. On the other hand, with the progress of integrated circuit technology, the digitalization of communication channels has become a reality, and for toll switching systems, "Research and Practical Application Report Vol. 28, No. 7, Digital Telephone Toll System DTS-1 Special Feature" ( Although it has been put into practical use as shown in the publication (published by Nippon Telegraph and Telephone Public Corporation and Musashino Telecommunications Research Institute), it is not possible to transmit large amplitude signals to subscriber switching systems using digital communication paths.
It is necessary to provide the BORSCHT function before the communication path, and there is a particular demand for miniaturization and cost reduction of subscriber circuits. Therefore, the conventional configuration, which mainly consists of electromagnetic parts such as blocking wires called letter coils or relays, cannot achieve the purpose, and it is essential to integrate the subscriber circuit. For example,
“IEICE Technical Research Report” Vol.79, No.34,
As stated in ``A Consideration of Call Current Supply System'' published in SE79-20 (published by the Institute of Electronics and Communication Engineers), a few studies have been carried out. However, simply replacing the function of the letter coil with an electronic circuit will result in a large power loss in the line current supply circuit due to the supply of line current, and heat dissipation will become an issue when integrating the circuit. Solving this problem is considered to be an urgent task at present. In other words, Figure 1 shows the equivalent circuit of the line current supply system when a letter coil is used.
Let R _T be the internal resistance of TE, and let the line resistance of lines L ₁ and L ₂ be
When R _L is the DC resistance of the letter coil LT, R _S is the DC resistance of the letter coil LT, and E is the voltage of the power source B, the line current I _L is expressed by the following equation. I _L = E / R _T + R _L + R _S ... (1) Also, the power loss P _S in the letter coil LT is: P _S = R _S・I _L ² = R _S / (R _T + R _L + R _S ) ²・E ² ...(2), and when the line resistance R _L is zero, P _S is maximum. Therefore, if the maximum value of P _S is Psmax, then Psmax = R _S / (R _T + R _S ) ²・E ² ...(3), R _T = 50Ω, R _S = 440Ω, E = 48V Then, Rsmax=4.2W, which is completely unacceptable for integrated circuits. The present invention satisfies such conventional demands and fundamentally solves the conventional problems, and by controlling the voltage supplied to the line according to the line resistance, the line current supply circuit is The purpose of the present invention is to provide a line current supply system that keeps power loss to a minimum and allows for extremely easy integration into circuits. The details of the present invention will be described below with reference to FIG. 2 showing an embodiment, but first, the principle of the present invention will be explained. That is, in Fig. 1, the line resistance R _L and the internal resistance R _T when looking from the line terminals t ₁ and t ₂ to the terminal equipment TE side are
is given by the ratio of the line voltage V _L between the line terminals t ₁ and t ₂ and the line current I _L , so the following equation holds true. R _T +R _L =V _L /I _L ...(4) Therefore, by substituting equation (4) into equation (1), we get
The following equation is obtained. E = R _S · I _L + V _L ... (5) Therefore, it is sufficient to determine the voltage E of power supply B based on equation (5). Based on the above principle, the line current supply circuit (hereinafter referred to as supply circuit) is
The LCF is equipped with a voltage detection circuit DET _V using a voltage divider etc. to detect the line voltage V _L between the lines L ₁ and L ₂ , and a series resistor DET V to detect the line current I _L. Current detection circuit using an operational amplifier, etc.
DET _I is provided, these detection outputs are processed by the arithmetic circuit.
CAL, and the same circuit CAL is applied to each detection circuit.
Calculations are performed based on the detection outputs of DET _V and DET _I. In other words, the arithmetic circuit CAL is a voltage detection circuit
V _L indicated by the detection output of DET _V and the current detection circuit
Based on I _L indicated by the detection output of DET _I , the internal resistance of the predetermined supply circuit LCF is set as R _S.
Equation (5) is calculated, thereby determining the voltage E _c corresponding to the line current I _L and the line voltage V _L , and a signal indicating this is applied to the input of the comparator CMP. Also, the other input of comparator CP has a supply circuit
Voltage of power supply B′ determined according to the configuration of LCF
A voltage setting signal S _e indicating E' is given, and a signal based on the difference between the voltage setting signal S _e and the signal indicating the voltage E _c obtained by calculation is sent to the comparator.
This error signal is obtained as an error signal at the output of the CMP, and this error signal controls the power supply conversion circuit CONV, which will be described later, to change its output voltage _VP . Therefore, the output voltage of the power conversion circuit CONV
V _P is controlled in the direction where the error becomes zero, and the comparator
The gain in the transition region, which is the region where both CMP inputs are approximately equal, is large, so equilibrium is reached when E _c and S _e are approximately equal, and this state can be regarded as E _c = S _c in practice. A predetermined line current I _L is supplied from the power conversion circuit CONV to the line between the line terminals t ₁ and t ₂ . Therefore, the output voltage V _P is determined according to the line resistance R _L and internal resistance _RT of the lines L ₁ and L ₂ , so that the power loss in the supply circuit LCF is always kept at the minimum value. FIG. 3 is a block diagram including a specific example of the configuration of the arithmetic circuit CAL.
and an adder AD, and after multiplying the detection force of the current detection circuit DET _I by the resistance setting coefficient K _rs corresponding to the DC resistance R _S of the letter coil LT in the coefficient multiplier K, the voltage detection circuit is DET _V
The detection power of E _c =
The calculation K _rs ·I _L +V _L =R _S ·I _L +V _L is performed. That is, in the calculation circuit CAL, the calculation of equation (5) is performed, and by determining the resistance setting signal K _rs in advance according to the conditions of each detected power,
Based on calculations corresponding to these, a signal indicating a voltage E _c corresponding to the line current I _L and the line voltage V _L is obtained. In addition, in Fig. 2, the coefficient unit K is replaced by a current detector DET _I
Although _it was inserted _{on the side of} May be inserted into each detector
It may be inserted into each of the DET _I and DET _V sides. In addition, the voltage setting signal is set according to the resistance setting coefficient Krs.
S _e may be determined, but these coefficient Krs and signal S _e can also be arbitrarily determined depending on the conditions of each detection force. Note that the coefficient unit K and adder AD are generally
Although it can be configured with a voltage divider and an operational amplifier, the configuration shown in FIG. 4 is preferable. FIG. 4a shows a so-called current mirror circuit, in which the output current Iout is proportional to the input current Iin, and
The junction area of transistors Qin and Qout is
If Ain and Aout are used, then Iout/Iin=Aout/Ain...(7), and Iout=Aout/AinIin...(8). Therefore, for example, the configuration is as shown in FIG. 4b, the line voltage V _L is made to correspond to the current signal Ivl, the line current I _L is made to correspond to the current signal Iil, and the junction area ratio between the transistors Qa and Qb is set to 1: Kns, and if the junction area ratio between transistors Qc and Qd is 1:1, Iec=Ive+Krs·Iil (9), and a current signal Iec corresponding to voltage Ec is obtained. However, when converting the current signal Iec to a voltage, it is sufficient to pass the current signal Iec to a resistor and take out the terminal voltage.To obtain each input current Iil, Ivl from the voltage, insert a series resistor. Moreover, the input current
It is sufficient if Iil and Ivl are compatible. Note that, as shown in FIG. 4c, if the voltage setting signal Se is applied as a current Ise, the comparator CMP in FIGS. 2 and 3 can also be configured by a current mirror circuit including transistors Qe and Qf. However, in this case, the current is indicated by the error signal Ise-Iec. Furthermore, the supply circuit LCF is required to exhibit a predetermined impedance to alternating currents such as communication current and signal current, and in reality, an impedance circuit having a configuration as shown in FIG. 5, for example, is inserted on the output side. . In other words, resistor R ₁ is connected to transistors Q ₁ and Q _2.
~ R ₄ provides a forward bias, and the collector-emitter resistance of transistors Q ₁ and Q ₂ to direct current is extremely low, but capacitor C ₁ provides a forward bias to the bases of transistors Q ₁ and Q ₂ . Since they have the same potential, they exhibit an impedance determined according to each constant for alternating current applied between terminals t ₁ and t _2. Depending on the selection of the constants, high impedance or A predetermined termination impedance is obtained. This impedance circuit is based on "IEICE Technical Research Report" Vol.79, No.34, SE79-20.
(Published by Institute of Electronics and Communication Engineers), "A Consideration of Call Current Supply System" P58, Table 1 shows that
Any one can be applied as long as it exhibits a similar function. Further, the voltage loss due to the insertion of the impedance circuit may be corrected using the voltage setting signal Se or the resistance setting coefficient krs described above. FIG. 6 is a circuit diagram showing a specific example of the power conversion circuit CONV, where A is a step-down type that obtains an output voltage in a range lower than the input voltage, and B is a step-up type that obtains an output voltage in a range higher than the input voltage. In both cases, there is a blockage line L on a line between input terminal 1 and output terminal 3.
is inserted, and a capacitor C is connected between output terminals 3 and 4, so that the output voltage Vout
A comparison controller CCP is provided for comparing the reference voltage V r and the reference voltage V _r . Since the purpose of the explanation of the power supply circuit that follows is to explain the operating principle, the input voltage will be exemplified as a positive polarity case to avoid terminological confusion, but in order to reverse this polarity, the direction of the diode and the voltage It is sufficient to reverse all the polarities, and read the rise in voltage in the following explanation as a fall (increase in absolute value), and read the height of the voltage value as the magnitude of the absolute value. In the step-down type shown in figure A, a switch _S1 is provided in series to the input side of the blockage line L, and the switch S1 is turned on and off.
Comparison controller for duty ratio based on off time ratio
Output voltage when the CCP controls and the duty ratio is 100%, that is, switch _S1 is in the on state.
With Vomax as the upper limit, the output voltage Vout is lowered by decreasing the duty ratio, and the reference voltage V _r and the output voltage Vout are made to match. Note that the capacitor C is used to remove ripples from the output voltage Vout, and the diode _D1 is a flywheel diode that forms a DC circuit between the output terminals 3 and 4 when the switch _S1 is turned off. . In addition, in the step-up type shown in Figure B, a switch _S2 is inserted between the output side of the blocking wire L and the other wire between the input terminal 2 and the output terminal 4, and this switch is turned on. The output voltage is higher than the input voltage Vin in order to release the electromagnetic energy accumulated in the blockage wire L when the switch _S2 is turned off.
Vout is obtained and the duty ratio of switch S ₂ is close to 0%, the output voltage Vout is increased by increasing the duty ratio to approximately 85% with the output voltage Vomin as the lower limit, and the reference voltage V _r and output The voltage Vout is matched. Therefore, since the input terminal of the comparison controller CCP to which the reference voltage V _r is applied can be used as a terminal to control the output voltage, this terminal reference voltage
If an error signal is applied instead of V _r , the output voltage of the power supply conversion circuit can be controlled by the error signal, and the operation described in the first embodiment can be achieved. Note that the diode _D2 is provided to prevent the charge in the capacitor C from discharging to the input side when the switch _S2 is turned on. In addition, the comparison controller CCP in this case is composed of an oscillator, a comparator, and a modulator that pulse width modulates the output of the oscillator using the output of the comparator, but the comparator is deleted from the comparison controller CCP, The modulator may be driven directly by the error signal; in the step-down type, a simple comparator is used as the comparison controller CCP, and the switch S ₁
There is also a self-excited type that controls, and various control means have been proposed. However, this type of power conversion circuit is
As shown in P151 of Table 2-3, the lower limit output voltage Vomin of the step-up type is approximately 2V higher than the input voltage Vin, and the upper limit voltage Vomax of the step-down type is approximately 1V lower than the input voltage Vin, with a value equal to the input voltage Vin. Unable to obtain output voltage Vout. In other words, in the case of a step-down type, if the loss of each circuit element is ignored, the output voltage Vout will be Given by Eq. Vout=T _S1ON /T _S1ON +T _S1OFF・Vin...(10) Here, T _S1ON is the on time of the first switch _S1 ,
T _S1OFF is the off time of the first switch _S1 . However, in reality, due to the loss of the first switch S ₁ and the blocking wire L, the upper limit Vomax of the output voltage Vout is 1 to 2 V lower than the theoretical value when the duty ratio is 100%.
It will be a low value. In addition, in the case of a boost type, if the loss of each circuit element is ignored, "transistor technology"
P118 of the July 1977 issue (published by CQ Publishing Co., Ltd.),
As shown in equation (18), the output voltage Vout is given by the following equation. Vout=(Vin・T _S2ON ) ^2/2・Iout・_LP (T _S2
ON +T _S2OFF ) + Vin...(11) However, Iout is the output current, L _P is the inductance of the blocking wire L, T _S2ON is the on time of the second switch S ₂ , and T _S2OFF is the off time of the second switch S ₂ It's time. Furthermore, the first term on the right side of equation (11) is an increase in the output voltage Vout based on the electromagnetic energy accumulated in the blocking wire L while the second switch _S2 is on, but the second term on the right side Since there is actually a loss due to circuit elements, Vin is the upper limit output voltage Vomax in the step-down type.
corresponds to this. FIG. 7 shows a power conversion circuit that can obtain a wide range of output voltages in the high and low directions relative to the input voltage using the same circuit, in which the first switch S ₁ and the second switch
It is equipped with diodes D ₁ and D ₂ as well as diodes D 1 and D 2 , and is a combination of the step-down type and step-up type shown in _FIG . A comparator circuit CPC is provided to compare the output voltage Vout with the output a.
The output c is applied to the OR gate G ₁ and the AND gate G ₂ to limit the output supply of the comparison controller CCP to each switch S ₁ and S ₂ , while the output c is applied to the AND gate G ₄ and The output of Vout is supplied to the second switch _S2 , and the output voltage Vout is equal to the input voltage Vin
When the voltage is near the input voltage Vin, a period is provided in which the first switch and the second switch are simultaneously turned on, and each switch S ₁ and S ₂ is turned on and off. value of output voltage
In addition to obtaining Vout, an output voltage Vout between the upper limit output voltage Vomax in the step-down type operation described above and the lower limit output voltage Vomin in the step-up type operation is also obtained. FIG. 8 is a block diagram showing a specific example of the comparator circuit CPC, in which comparators CP ₁ to CP ₃ and AND gate G ₁₁
and an inverter IN, and operates according to the input/output characteristics shown in Figure 9, which shows the waveforms of each part. That is, comparator CP ₁ compares input voltage Vin and output voltage Vout, and the difference is calculated by comparator CP1.
It is given to CP ₂ and CP ₃ , and along with this, comparators CP ₂ and
CP ₃ has a reference voltage based on the relationship shown in Figure 9 centered around input voltage Vin - output voltage Vout = 0.
V _r1 and V _r2 are given to each individual. Therefore, if the output of comparator CP ₁ exceeds the reference voltage V _r1 , the output a of comparator CP ₂ becomes "H" (high level), while the output of comparator CP ₁ exceeds the reference voltage V r1.
When _Vr2 is exceeded, the output b of the comparator _CP3 turns to "H", and while the output a is "L" (low level), the output of the inverter IN goes "H".
Then, with AND gate _G11 in the on state, output b
passes through, and the AND gate _G11 sets the output c to "H" only when the output of the comparator _CP1 is between _Vr1 and _Vr2 .
Output c acts as a window comparator. Therefore, in FIG. 7, the output voltage
When Vout is lower than the input voltage Vin by more than V _r2 , both outputs a and c of the comparator circuit CPC are "L", so the AND gates G ₂ and G ₄ are in the off state, and the output of the comparator controller CCP causes the Only one switch _S1 performs on/off operations, and its duty ratio changes according to changes in the reference voltage V _{r .}
The duty ratio is determined when the output voltage Vout matches the output voltage Vout, whereas the output voltage is set in the range where the output voltage Vout is approximately equal to the input voltage Vin, that is, the range of the reference voltage V _r1 to V _r2 shown in Fig. 9. When Vout is input, the output a of the comparator circuit CPC is “L” and the output c
becomes “H” and the first switch _S1 becomes the comparison controller.
The output from the pulse generator PG is turned on and off by the output of the CCP, and the output from the pulse generator PG is sent to the second switch via the AND gate _G4 , which is turned on by the output c of the comparator circuit CPC, and the OR gate _G3 .
The same switch _S2 also performs on/off operations, and due to the interaction between the buck type operation and the boost type operation, _the output voltage is approximately equal to the input voltage Vin.
Vout is generated, and the duty ratio of the first switch _S1 is determined in a state where the reference voltage _Vr and the output voltage Vout match. However, for the on/off operation of the first switch _S1 and the second switch _S2 , it is necessary to provide a period in which they are both on at the same time. give to,
The switches S ₁ and S ₂ are assumed to perform on and off operations in synchronization. Also, the output voltage Vout is lower than the input voltage Vin by V _r1
If it becomes higher than that, the output a of the comparator circuit CPC becomes "H" and the output c becomes "L", so the first switch
When S ₁ turns on, AND gate G ₂ turns on and AND gate G ₄ turns off, and the second switch S ₂ turns on and off according to the output of the comparison controller CCP, changing the operating state of the boost type. becomes. As the pulse generator PG, a multivibrator etc. can be applied, and a frequency dividing circuit that divides the frequency of the clock pulse may be used, and the frequency division operation may be controlled by a synchronizing signal, and the frequency dividing circuit may be controlled in synchronization with the synchronizing signal and at a predetermined rate. Any device can be used as long as it generates a pulse having a duty ratio. In addition, the comparators CP ₂ and CP ₃ in FIG.
In order to avoid unstable operation when the output of comparator CP ₁ is near the reference voltages V _r1 and V _r2 , a system with level hysteresis characteristics is added by combining a Schmitt trigger circuit, etc. It is suitable if used. However, the power conversion circuit CONV is not limited to the above, but various configurations used in so-called switching regulators can be applied as long as the power conversion efficiency is good and the output voltage Vout can be controlled over a wide range. can. Note that the power conversion circuit CONV of the present invention is required to have a change range of output voltage Vout of about 5 to 40 V in practice, so the above-mentioned power conversion circuit is suitable, and as explained in FIG. The input terminal to which the reference voltage Vr of the device CCP is applied can be used as the output voltage control terminal.
The objective is achieved by providing an error signal instead of the reference voltage Vr. That is, the circuit from which the reference voltage Vr is removed in FIG. 7 corresponds to the power conversion circuit CONV in FIG. 3, and the terminal of the comparison controller CCP to which the reference voltage Vr removed in FIG. In the figure, it corresponds to the terminal of the power conversion circuit CONV to which the output of the comparator CMP is applied. That is, the circuit in FIG. 7 from which the reference voltage V _r is removed corresponds to the power conversion circuit CONV in FIG. 3, and the terminal of the comparison controller CCP to which the removed reference voltage V _r was connected in FIG. In FIG. 3, this corresponds to the terminal of the power conversion circuit CONV to which the output of CMP is given. In addition, the voltage detection circuit used in the arithmetic circuit CAL
DET _V , each detection output of the current detection circuit DET _I , and
For the voltage setting signal Se, resistance setting coefficient Krs, etc., other signals or detection outputs may be used as long as the relative relationship is the same, and various characteristics of the arithmetic circuit CAL, such as overload, signal-to-noise ratio, stability, The setting signal Se, resistance setting coefficient Krs, etc. can be determined according to the characteristics such as errors, and the calculation circuit can be set according to the conditions.
Various CAL configurations can be selected. In other words, in addition to the above-mentioned combination of voltage divider and operational amplifier, or current mirror circuit, a multi-input adder/subtractor circuit is constructed using one operational amplifier, and includes a coefficient unit K, an adder AD, a comparator CMP, etc. It is also optional to integrate them. In addition, the same effect can be obtained by using a power supply conversion circuit CONV that can control the output current and controlling the linear line current _IL , and the present invention can be freely modified as desired. In addition, the power conversion circuit using the arithmetic circuit CAL
Since the control of CONV stabilizes the line current I _L , it is possible to eliminate the influence of voltage fluctuations of the power supply B' on the line current I _L. FIG. 10 is a diagram for explaining that the input terminal of the comparison controller CCP of FIG. 7 to which the reference voltage V _r is applied can be used as the output voltage control terminal Tc. FIG. 11 is a diagram in which correspondence with each terminal in FIG. 10 is added to FIG. 3. The operation will be explained below with reference to FIG. The calculation circuit CAL performs a predetermined calculation based on the line power supply I _L and the line voltage V _L and outputs a voltage Ec. comparator
The CMP compares Ec with the voltage setting signal Se and outputs an error signal to the output of the CMP. The error signal is applied to the control terminal Tc (ie, one terminal of the comparison controller CCP of the power conversion circuit in FIG. 10). Next, we will show the process by which Ec is controlled by Se. In addition,
For simplicity, absolute values are used to determine the magnitude of voltage. Also,
The conditions are: voltage setting signal Se = 10V, terminal equipment
The resistance on the TE side is 500Ω, the resistance setting coefficient Krs is 500,
Let's take as an example the case where the voltage drop of the current detection circuit is 0V. As is well known, the comparator CMP has a large gain in the transition region. This gain K _cp
1000, a voltage of (Se-Ec)×K _cp is generated at the CMP output, and since this voltage is applied to the control terminal Tc, the output voltage of the power supply conversion circuit is also the same voltage. Now, assuming that the output voltage Vp of the power supply conversion circuit is 0V, since Vp is 0, both V _L and I _L are 0, and therefore Ec is also 0V. CMP output is (Se−Ec)×
K _cp = (10-0) x 1000 = 10000V (actually, the circuit is saturated, so for example about 50V). Therefore, Vp starts to rise towards 10000V. The table below shows how Ec and CMP output change as Vp increases. From this, it can be seen that even when the power conversion circuit shown in FIG. 7 is used, Ec can be controlled to approximately Se. Note that this operation of making Ec and Se match is based on the principle of negative feedback, which is a well-known principle.

【table】

[Table] As is clear from the above description, according to the present invention, the line current supply circuit that realizes a part of the BORSCHT function is mainly composed of electronic circuits, the internal power consumption is extremely small, and the line current supply circuit realizes a part of the BORSCHT function. By easily converting the supply circuit into an electronic circuit and an integrated circuit, the line current supply circuit can be made smaller, lighter, and less expensive, and great effects can be obtained in various converters.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing an equivalent circuit of a line current supply circuit, FIG. 2 is a block diagram showing an embodiment of the present invention,
Fig. 3 is a block diagram including a specific example of the configuration of the arithmetic circuit in Fig. 2, Fig. 4 is a circuit diagram when a current mirror circuit is applied to the arithmetic circuit, and Fig. 5 shows a situation where an impedance circuit is inserted. circuit diagram,
6 and 7 are circuit diagrams showing specific examples of the power conversion circuits in FIGS. 2 and 3, FIG. 8 is a block diagram showing a specific configuration of the comparison circuit in FIG. 7, and FIG. FIG. 8 is an input/output characteristic diagram showing waveforms of each part, and FIGS. 10 and 11 are diagrams for explaining the control operation of the power supply conversion circuit. TE...Terminal equipment, _L1 , _L2 ...Line, LCF...
Supply circuit (line current supply circuit), B, B'...Power supply, DET _V ...Voltage detection circuit, DET _I ...Current detection circuit, CAL...Arithmetic circuit, CONV...Power conversion circuit, Krs...Resistance Setting coefficient, Se... Voltage setting signal, L... Blockage wire, S ₁ ... Switch (first switch), S ₂ ... Switch (second switch),
CCP...Comparison controller, CPC...Comparison circuit, PG...
...Pulse generator.

Claims (1)

[Scope of Claims] 1. A line current supply circuit that supplies line current to terminal equipment via a line, comprising: (a) a power conversion circuit that converts a power supply voltage to a predetermined voltage and supplies it to the line; ) a voltage detection circuit that detects the line voltage V _L of the line; (c) a current detection circuit that detects the line current I _L with a resistance setting coefficient K _rs ; and (d) the line voltage V _L and the line current K _rs ·I _L detected with the resistance setting coefficient K _rs , that is, V _L
( _{e) a comparator that compares the calculation result E c of} the arithmetic circuit with a voltage setting signal _{S e indicating} the power supply voltage of the line current supply circuit; A line current supply system characterized in that the comparator output controls the output of the power supply conversion circuit so that the calculation result E _c and the voltage setting signal S _e match.