JPS6373744A - Phase control system - Google Patents

Phase control system

Info

Publication number
JPS6373744A
JPS6373744A JP61217814A JP21781486A JPS6373744A JP S6373744 A JPS6373744 A JP S6373744A JP 61217814 A JP61217814 A JP 61217814A JP 21781486 A JP21781486 A JP 21781486A JP S6373744 A JPS6373744 A JP S6373744A
Authority
JP
Japan
Prior art keywords
signal
output
error signal
error
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61217814A
Other languages
Japanese (ja)
Inventor
Yoshihisa Aotani
青谷 嘉久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61217814A priority Critical patent/JPS6373744A/en
Publication of JPS6373744A publication Critical patent/JPS6373744A/en
Pending legal-status Critical Current

Links

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To surely attain phase control after the completion of hit, by providing a comparator which sends only the output of a square unit beyond a threshold value, and a decision circuit which decides the output of the comparator, and outputs a third error signal only when the hit is generated in a reception signal. CONSTITUTION:Immediately after the hit, a signal (j) outputted through the square unit 5, the comparator 6, and a signal sending part 13 is four-value decided at a second decision circuit 7, and a decided output (k) is selected at a selector 8, and a selected signal (k) is sent to a carrier phase controller 3 through a signal sending part 12 as an error signal (e). At this time, the control operation of the carrier phase controller 3 is corrected. Furthermore, when the output (n) of a level detector 1 outputs a level 1, a multivalued error signal (g) outputted from a first decision circuit 4 is inputted to the carrier phase controller 3, through the selector 8, and the signal sending part 12, as the error signal (e). In this way, it is possible to surely control a rotary phase after completing the hit of the reception signal, preventing the rotation of a carrier due to phase jitter, or frequency offset, etc.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、多値直交振幅変調方式のデータ伝送装置に関
し、特に位相制御方式に関する0(従来の技術) 従来、この種の受信信号のキャリア位相制御方式は第5
図に示すものが知られている。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Field of Application) The present invention relates to a data transmission device using a multilevel quadrature amplitude modulation method, and particularly relates to a phase control method. The phase control method is the fifth
The one shown in the figure is known.

以下第5図に従って従来例を説明する。復調された受信
信号aが自動等化器2に入力し、自動等化器2よシ出力
された信号すは、中ヤリア位相制御器3に入力され、キ
ャリア位相制御器3から出力された受信信号Cは、判定
回路4に人力する0判定回路4では、復調された受信信
号aが送信信号のどのデータ点に対応しているかを判定
し、この判定したデータ点と復調信号(受信信号&)の
データ点から、エラー信号を生成し、該エラー信号を自
動等化器2及びキャリア位相制御器3に出力する。自動
等化器2は、エラー信号dKよって、タップの修正を行
い、振幅歪と群遅延歪を等化する。キャリア位相制御器
3は、エラー信号eを入力すると、周波数オフセットや
位相ジッタ等による位相誤差を補償する。レベル検出器
lは、受信信号aの瞬断が発生した時、自動等化器2及
びキャリア位相制御器3に入力するエラー信号d及びe
をゼロにするよう動作する。このとき、自動等化器2の
タップ及び位相制御器3のパラメータは、瞬断している
間、瞬断前の状態をそのiまホールドする。
A conventional example will be explained below with reference to FIG. The demodulated received signal a is input to the automatic equalizer 2, and the signal output from the automatic equalizer 2 is input to the carrier phase controller 3, and the received signal a is output from the carrier phase controller 3. The signal C is manually inputted to the judgment circuit 4. The 0 judgment circuit 4 judges which data point of the transmission signal the demodulated received signal a corresponds to, and compares this judged data point with the demodulated signal (received signal & ), an error signal is generated from the data points, and the error signal is output to the automatic equalizer 2 and the carrier phase controller 3. The automatic equalizer 2 corrects taps based on the error signal dK, and equalizes amplitude distortion and group delay distortion. When the carrier phase controller 3 receives the error signal e, it compensates for phase errors due to frequency offset, phase jitter, and the like. The level detector l outputs error signals d and e to the automatic equalizer 2 and the carrier phase controller 3 when a momentary interruption of the received signal a occurs.
It works to make it zero. At this time, the tap of the automatic equalizer 2 and the parameters of the phase controller 3 are held in the state before the momentary interruption while the momentary interruption occurs.

瞬断復帰後、レベル検出器1は再び瞬断の発生する前の
状BK戻る。即ち、レベル検出器1は、信号断の間、自
動等化器2と位相制御器3の各エラー信号d、  eの
入力を制御することで、図示しない受信部の制御系の暴
走を防止する。
After recovery from the instantaneous interruption, the level detector 1 returns to the state BK before the instantaneous interruption occurred. That is, the level detector 1 prevents the control system of the receiving section (not shown) from running out of control by controlling the input of each error signal d, e to the automatic equalizer 2 and the phase controller 3 during signal interruption. .

(発明が解決しようとする問題点) 上述した従来のキャリア位相制御方式では、信号の瞬断
が発生した時、必ずしも瞬断直前の位相制御器3の位相
が瞬断復帰直後の受信信号に通用し、等化されるとは限
らない場合がある。短い時間の瞬断てちればレベル検出
器1を使用した方式で等化することができる。しかし、
少し長い時間の瞬断の場合、キャリアの振幅歪やキャリ
アの群遅延歪は、はとんど変化しないが、瞬断の間に位
相ジッタやキャリア位相制御器3の推定した周波°数オ
フセットの誤差によシ位相回転が大きくなっている場合
があシ、多値データ直交振幅変調方式のデータ伝送にお
いては、隣)合うデータ点と距離が短いので、瞬断復帰
直後隣り合うデータ相互間の位相が回転してしまうと、
正しい判定ができなくなシ、この場合受信部の制御系が
暴走してしまう欠点がある。
(Problems to be Solved by the Invention) In the conventional carrier phase control method described above, when a momentary signal interruption occurs, the phase of the phase controller 3 immediately before the momentary interruption does not necessarily apply to the received signal immediately after recovery from the momentary interruption. However, it may not always be equalized. If the momentary interruption occurs for a short period of time, equalization can be performed using a method using the level detector 1. but,
In the case of an instantaneous interruption of a slightly longer time, the carrier amplitude distortion and carrier group delay distortion hardly change, but during the instantaneous interruption, the phase jitter and the frequency offset estimated by the carrier phase controller 3 change. In some cases, the phase rotation becomes large due to an error.In data transmission using multilevel data quadrature amplitude modulation, the distance between adjacent data points is short, so the difference between adjacent data points immediately after recovery from a momentary power loss is If the phase rotates,
This has the disadvantage that correct judgment cannot be made, and in this case, the control system of the receiving section goes out of control.

本発明は前述の問題点に鑑みてなされたもので、受信信
号の瞬断が生じたとしても瞬断終了後も確実に位相制御
する位相制御方式を提供することを目的とする。
The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a phase control method that reliably controls the phase even after the momentary interruption of the received signal occurs.

(問題点を解決するための手段) 前述の問題点を解決し、上記目的を達成するために本発
明が提供する手段は、受信信号を判定してmlのエラー
信号と第2のエラー信号を出力する第1の判定回路と、
該第1のエラー信号に基づいて前記受信信号の振幅歪と
遅延歪を等化する自動等化器と、前記第2のエラー信号
に基づいて前記受信信号のジッタ等による位相誤差を補
正する位相制御器と、前記受信信号の瞬断を検出したと
きだけ前記第1及び第2のエラー信号の出力を阻止する
レベル検出器とを備えた位相制御方式であって、前記受
信信号を自乗する自乗器と、該自乗器の出力と予め設定
した閾値とを比較し閾値以上の庖記自乗器出力だけを送
出する比較器と、該比較器の出力を判定して前記受信信
号が瞬断したときだけ第3のエラー信号を出力する第2
の判定回路と、少なくとも前記受信信号が瞬断している
あいだ該第3のエラー信号を前記位相制御器に送出する
セレクタとを設け、受信信号の瞬断時に第3のエラー信
号を受けているときだけ位相制御器を作動させることを
特徴とする。
(Means for Solving the Problems) In order to solve the above-mentioned problems and achieve the above objects, the present invention provides means for determining a received signal and determining an ml error signal and a second error signal. a first determination circuit that outputs;
an automatic equalizer for equalizing amplitude distortion and delay distortion of the received signal based on the first error signal; and a phase correcting phase error due to jitter or the like in the received signal based on the second error signal. A phase control system comprising: a controller; and a level detector that blocks output of the first and second error signals only when an instantaneous interruption of the received signal is detected; a comparator that compares the output of the squarer with a preset threshold and sends out only the output of the squarer that is equal to or higher than the threshold; and when the received signal is momentarily interrupted by determining the output of the comparator. only the second outputs the third error signal
and a selector that sends the third error signal to the phase controller at least while the received signal is momentarily interrupted, and receives the third error signal when the received signal is momentarily interrupted. It is characterized in that the phase controller is activated only when

(実施例) 次に1本発明について図面を参照して説明する。(Example) Next, one embodiment of the present invention will be explained with reference to the drawings.

第1図は、本発明の一実施例を示したブロック図である
。レベル検出器lは、入力信号aのレベルが急激に低下
した時、第1の出力信号mと第2の出力信号nに、それ
ぞれレベルI01を出力する。第1の出力信号mは、低
下した入力信号aのレベルが再び低下前のレベルに戻っ
た時にレベル′1°に設定される。第2の出力信号nは
第1の出力信号mがレベル11@に戻った後、所定時間
をおいてレベル111に設定される。自動等化器2に入
力されるエラー信号dに注目すると、信号aの瞬断が発
生した場合、レベル検出器1、エラー送出部11を介し
て入力するエラー信号dはレベル101に設定される。
FIG. 1 is a block diagram showing one embodiment of the present invention. The level detector l outputs a level I01 to a first output signal m and a second output signal n, respectively, when the level of the input signal a suddenly decreases. The first output signal m is set to level '1° when the level of the input signal a, which has decreased, returns to the level before the decrease. The second output signal n is set to level 111 after a predetermined period of time after the first output signal m returns to level 11@. Focusing on the error signal d input to the automatic equalizer 2, when a momentary interruption of the signal a occurs, the error signal d input via the level detector 1 and the error sending section 11 is set to level 101. .

この時、自動等化器2のタップは瞬断が終了するまでホ
ールドされる。
At this time, the tap of the automatic equalizer 2 is held until the instantaneous interruption ends.

瞬断が終了すると、エラー送出部11には、第1の判定
回路4からエラー信号fが入力される。このエラー信号
fは、エラー信号dとして自動等化器2に与えられる。
When the momentary interruption ends, the error signal f is input from the first determination circuit 4 to the error sending section 11. This error signal f is given to the automatic equalizer 2 as an error signal d.

自動等化器2に内蔵したタップは、間断の間瞬断前の状
態をホールドしてお夛、自動等化器2は瞬断終了後に入
力するエラー信号fK基づいて正常に動作する。
The tap built into the automatic equalizer 2 holds the state before the instantaneous interruption during the interruption, and the automatic equalizer 2 operates normally based on the error signal fK input after the instantaneous interruption ends.

一方、キャリア位相制御器3に入力するエラー信号eは
、瞬断時レベル’O”K設定され、位相制御器3の制御
動作を禁止する。瞬断が終了するまでこの状態をホール
ドする。信号送出部13が、多値データ信号である受信
信号Cを入力すると、所定のスレショルドレベルよりも
小さい振幅のデータを除いた信号jを4値判定する第2
の判定回路7に送出する。第2の判定回路7は、エラー
信号出力kをセレクタ8に出力する。次にレベル検出器
1の出力信号nがレベル”1”Kなると、セレクタ8を
作動してエラー信号eを、第1の判定回路4から出力さ
れるエラー信号gに切シ換える。
On the other hand, the error signal e input to the carrier phase controller 3 is set to the level 'O''K at the moment of momentary interruption, and prohibits the control operation of the phase controller 3.This state is held until the momentary interruption ends.Signal When the transmitter 13 receives the received signal C, which is a multilevel data signal, the transmitting unit 13 performs a second four-level judgment on the signal j excluding data with an amplitude smaller than a predetermined threshold level.
It is sent to the determination circuit 7. The second determination circuit 7 outputs the error signal output k to the selector 8. Next, when the output signal n of the level detector 1 reaches the level "1"K, the selector 8 is operated to switch the error signal e to the error signal g output from the first determination circuit 4.

今、64値の入力信号aが自動等化器2に入力し、且つ
、自動等化器2及びキャリア位相制御器3が正常動作し
ているとする。この状態で入力信号aO[断が発生した
とすると、自動等化器2とキャリア位相制御器3を通過
して出力された復調信号Cは瞬断の終了直後、第2図の
アイパターンに示すように位相ジッタやキャリア位相制
御器3の周波数オフセット推定誤差の為、キャリアの位
相が回転することがある。即ち、従来、第2図のような
アイパターンでは、キャリア位相制御器3の出力信号C
は、位相が10’以上回転すると、となシ合うデータ点
との認識が不可能になシ、図示しない受信部の制御系が
暴走してしまうことがある。本方式においては、瞬断直
後、自乗器5と比較器6と信号送出部13を通って出力
される信号jt−第2の判定回路7で4値判定し、判定
出力kを、セレクタ8で選択し、この選択した出力kを
信号送出部12を介してキャリア位相制御器3にエラー
信号eとして送出する。この時、キャリア位相制御器3
の制御動作が修正される。即ち、キャリア位相制御器3
0出力Cは、第3図に示すようなアイパターンに修正さ
れる。さらにレベル検出器1の出力nがレベル11′を
出力すると、キャリア位相制御器3には、第1の判定回
路4で出力した多値のエラー信号gがセレクタ8及び信
号送出部12を介して、エラー信号eとして入力される
。こうして最終的にキャリア位相制御器3の復調信号C
は、第4図に示すような64値のアイパターンが再生さ
れる。
Assume now that a 64-value input signal a is input to the automatic equalizer 2, and that the automatic equalizer 2 and the carrier phase controller 3 are operating normally. If the input signal aO [interruption occurs in this state, the demodulated signal C that passes through the automatic equalizer 2 and the carrier phase controller 3 and is output will be as shown in the eye pattern in Fig. 2 immediately after the interruption ends. The phase of the carrier may rotate due to phase jitter or frequency offset estimation error of the carrier phase controller 3. That is, conventionally, in the eye pattern as shown in FIG. 2, the output signal C of the carrier phase controller 3
If the phase rotates by more than 10', it becomes impossible to recognize data points that match each other, and the control system of the receiver (not shown) may go out of control. In this method, immediately after a momentary interruption, the signal jt outputted through the squarer 5, the comparator 6, and the signal sending section 13--the second judgment circuit 7 performs a four-value judgment, and the judgment output k is outputted by the selector 8. The selected output k is sent to the carrier phase controller 3 via the signal sending section 12 as an error signal e. At this time, carrier phase controller 3
control behavior is modified. That is, the carrier phase controller 3
The zero output C is corrected to an eye pattern as shown in FIG. Furthermore, when the output n of the level detector 1 outputs a level 11', the multi-value error signal g output from the first determination circuit 4 is transmitted to the carrier phase controller 3 via the selector 8 and the signal sending section 12. , is input as an error signal e. In this way, the demodulated signal C of the carrier phase controller 3 is finally
In this case, a 64-value eye pattern as shown in FIG. 4 is reproduced.

次に判定回路4及び判定回路7の各エラー信号f、  
g、 kを説明すると、ある時点で復調信号デ信信号デ
ータ点dnに対応したとすると、その時点でのエラー信
号f1エラー信号gのそれぞれはan、dnを用いて次
式のように表わされる。
Next, each error signal f of the determination circuit 4 and the determination circuit 7,
To explain g and k, if it corresponds to the demodulated signal decoded signal data point dn at a certain point, the error signal f1 at that point and the error signal g are each expressed as the following equation using an and dn. .

ここでan、dnは複素データとして取シ扱うこととす
る。
Here, an and dn are treated as complex data.

f = d n −a n g= −Im (an X ;n’/ I dn l”
 )又、第2の判定回路7の出力信号には、第1の判定
回路4の出力信号gと同じである。エラー信号fは複素
数である。
f = dn -a n g= -Im (an X ;n'/I dn l"
) Also, the output signal of the second determination circuit 7 is the same as the output signal g of the first determination circuit 4. The error signal f is a complex number.

(発明の効果) 以上説明したように、本発明によれば受信信号に瞬断が
発生したとしても位相ジッタや周波数オフセット等によ
るキャリアの回転を、防止しつつ、受信信号の瞬断終了
後、確実に回転位相を制御できる効果がある。
(Effects of the Invention) As described above, according to the present invention, even if a momentary interruption occurs in the received signal, rotation of the carrier due to phase jitter, frequency offset, etc. is prevented, and after the momentary interruption of the received signal ends, This has the effect of reliably controlling the rotational phase.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック図、第2図は
瞬断直後のキャリア位相制御器の出力信号のアイパター
ン図、第3図は第2図のアイパターンを4値判定で修正
したアイパターン図、第4図は第3図のアイパターンを
64値判定で修正したアイパターン図、第5図は従来例
を示したブロック図である。 1・・・レベル検出回路、2・・・自動等化器、3・・
・キャリア位相制御器、4・・・多値判定回路、訃・・
自乗器、6・・・比較器、7・・・4値判定回路、訃・
・セレクタ0 第2図 第3図
Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is an eye pattern diagram of the output signal of the carrier phase controller immediately after a momentary interruption, and Fig. 3 is a four-value judgment of the eye pattern in Fig. 2. A modified eye pattern diagram, FIG. 4 is an eye pattern diagram obtained by modifying the eye pattern of FIG. 3 by 64-value determination, and FIG. 5 is a block diagram showing a conventional example. 1... Level detection circuit, 2... Automatic equalizer, 3...
・Carrier phase controller, 4...Multi-value judgment circuit, 4...
Squarer, 6... Comparator, 7... 4 value judgment circuit,
・Selector 0 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】 受信信号を判定して第1のエラー信号と第2のエラー信
号を出力する第1の判定回路と、該第1のエラー信号に
基づいて前記受信信号の振幅歪と遅延歪を等化する自動
等化器と、前記第2のエラー信号に基づいて前記受信信
号のジッタ等による位相誤差を補正する位相制御器と、
前記受信信号の瞬断を検出したときだけ前記第1及び第
2のエラー信号の出力を阻止するレベル検出器とを備え
た位相制御方式において、 前記受信信号を自乗する自乗器と、該自乗器の出力と予
め設定した閾値とを比較し閾値以上の前記自乗器出力だ
けを送出する比較器と、該比較器の出力を判定して前記
受信信号が瞬断したときだけ第3のエラー信号を出力す
る第2の判定回路と、少なくとも前記受信信号が瞬断し
ているあいだ該第3のエラー信号を前記位相制御器に送
出するセレクタとを設け、受信信号の瞬断時に第3のエ
ラー信号を受けているときだけ位相制御器を作動させる
ことを特徴とする位相制御方式。
[Claims] A first determination circuit that determines a received signal and outputs a first error signal and a second error signal; and a first determination circuit that determines the amplitude distortion and delay of the received signal based on the first error signal. an automatic equalizer that equalizes distortion; a phase controller that corrects a phase error due to jitter or the like of the received signal based on the second error signal;
A phase control method comprising: a level detector that blocks output of the first and second error signals only when a momentary interruption of the received signal is detected; a squarer that squares the received signal; and the squarer a comparator that compares the output of the comparator with a preset threshold value and sends out only the squarer output that is equal to or higher than the threshold value; a second determination circuit that outputs the second error signal; and a selector that sends the third error signal to the phase controller at least while the received signal is momentarily interrupted; A phase control method that operates the phase controller only when the signal is being received.
JP61217814A 1986-09-16 1986-09-16 Phase control system Pending JPS6373744A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61217814A JPS6373744A (en) 1986-09-16 1986-09-16 Phase control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61217814A JPS6373744A (en) 1986-09-16 1986-09-16 Phase control system

Publications (1)

Publication Number Publication Date
JPS6373744A true JPS6373744A (en) 1988-04-04

Family

ID=16710155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61217814A Pending JPS6373744A (en) 1986-09-16 1986-09-16 Phase control system

Country Status (1)

Country Link
JP (1) JPS6373744A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012209897A (en) * 2011-03-30 2012-10-25 Sony Corp Signal receiving apparatus, signal receiving method, and program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012209897A (en) * 2011-03-30 2012-10-25 Sony Corp Signal receiving apparatus, signal receiving method, and program
US8885771B2 (en) 2011-03-30 2014-11-11 Sony Corporation Signal receiving apparatus, signal receiving method and signal receiving program

Similar Documents

Publication Publication Date Title
US5394110A (en) Demodulation system having adaptive matched filter and decision feedback equalizer
EP0154565B1 (en) Modem
US7570713B2 (en) System and method for anticipatory receiver switching based on signal quality estimation
CA1292525C (en) Digital demodulation system
US6788749B2 (en) Erasure based instantaneous loop control in a data receiver
JPH09135280A (en) Method and device for decreasing effect of impulse noise onto receiver
KR20010031066A (en) Signaling using phase rotation techniques in a digital communication system
KR900002330B1 (en) Radio receiver
US4736388A (en) Automatic fall back and restore system for data communication
JPH03255729A (en) Demodulation system
US5153527A (en) Demodulation apparatus having reception state evaluation
US5638400A (en) Receiver
JPS6373744A (en) Phase control system
WO2006137175A1 (en) Frame synchronization device and frame synchronization method
US5535248A (en) Digital radio communication system
JPH01194613A (en) Automating equalizer initializing system
JP7446678B2 (en) wireless receiving device
JPH0748677B2 (en) Equalizer
JP3029283B2 (en) Frame synchronization method
JP3029282B2 (en) Frame synchronization method and receiving apparatus to which this method is applied
JPH0787154A (en) Frame synchronizing method for multilevel quadrature amplitude modulation system
JPH09233001A (en) Tdma burst signal demodulator
JPS613552A (en) Carrier recovery system
JPH04119016A (en) Automatic equalization system
JPH07170306A (en) Demodulator