JPS6370333A - Digital arithmetic unit - Google Patents

Abstract

PURPOSE:To obtain a highly reliable arithmetic answer of the inverse of X.2<-2> by inverting all bits of input information (Xm-X1) respectively consisting of m bits, shifting down the digits of the n-th bit and after (the inverse of Xn- the inverse of X1) and adding the n-th bit (the inverse of Xn) to residual information (the inverse of Xm- the inverse of Xn+1). CONSTITUTION:Input information X consisting of (n) bits is inverted by an inverting circuit 14 and the inverted information (the inverse of X) is shifted by a shifting circuit 15 so that the n-th bit and after (the inverse of Xn- the inverse of X1) are shifted down to obtain shift-down information (the inverse of Xm- the inverse of Xn+1). The n-th bit information (the inverse of Xn) of the shift-down information (the inverse of Xm- the inverse of Xn+1) is added to the inverted information (the inverse of Xm- the inverse of Xn+1) by an adder 16 to obtain an answer Y. When the answer Y is indicated by a decimal number in accordance with a prescribed formula and an error DELTAfor complement information (the inverse of X) is calculated, both the maximum error and average error can be reduced. The arithmetic answer Y of the inverse of X.2<-n> (X is informations Xm-X1 respectively consisting of (m) bits and (n) is an integer satisfying 0<=n<=m) can be highly reliably obtained by the digital arithmetic unit based upon said constitution.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to an improvement of a digital arithmetic device suitable for use as, for example, a digital filter.

(Prior Art) As is well known, in the fields of audio IJm equipment and imaging equipment, information signals such as acoustic signals and image signals are transmitted to CM (Pulse Code Modification > VTTAVC) Digital recording and reproducing systems have become widespread, which convert the data into digitized data, record it on a recording medium such as a disk or magnetic tape, and then play it back. .

Of these, compact discs, which use discs as recording media, are currently the mainstream, with pit rows corresponding to digitized data formed on a disc with a diameter of 12 mm, which can be read optically. It becomes.

On the other hand, a player that plays back the above-mentioned compact disc moves an optical pickup containing a semiconductor laser, a photoelectric conversion element, etc. in the radial direction of the disc in a linear tracking direction, and moves the disc along with a stone at constant linear velocity (CLV). ) The data recorded on the disc can be read by rotating it in the following manner.

Here, in an optical disc playback device that plays back the above-mentioned disc, tracking servo and focus servo are applied to the objective lens provided in the optical pickup, and K is used to ensure stable data reading. are doing. These tracking servos and focus servos generate tracking error signals and focus error signals based on signals output from an optical pickup, and pass each error signal through a phase compensation filter circuit, a drive circuit, etc. to the objective lens. This is accomplished by constructing a servo loop that supplies the 7-channel actuator for moving in the tracking direction and the focus direction.

Incidentally, in recent years, in addition to digital signal processing systems for data demodulation and reproduction, the above-mentioned servo loops have been increasingly constructed with digital circuits. Digital filters are also increasingly being used as loop filter circuits. This digital filter performs a so-called convolution sum operation in which input data is multiplied by coefficient data and the results are cumulatively added.The arithmetic expression thereof can generally be expressed as follows.

Here, in the above equation (1), X(k)h(n-k) is −p(n-k) −q(n-k) −r
(n-k)X(k)・2 ±X(k)・2 ±
Since it can be approximated as X(k)・2, (1)
In order to perform the calculation of the formula, it is necessary to perform the calculation -X.2-n.

FIG. 2 shows a conventional digital calculation means for performing the above-described calculation -X.2. That is, m-bit input data (X) has all the pits inverted by the inversion circuit 11VC, and the inverted data
By adding j5@l'' to 2, two's complement data (-X) is generated. Then, this complement data (-X) is processed by the shift circuit 13, with bits below the nth bit being omitted. The solution (Y) is obtained here.

To explain specifically, assume that 3-bit input data (X, %X1) shown in Table (1) is supplied and n=2. Then, the input data (XS to
~Xt). Then, this inverted data (XS
~xt)tc and @1'' are added by the adder circuit 12 to generate complement data (-X) as shown in Table (3). Thereafter, this complement data (-X) is shifted by 2 bits to the left in Table (3) by the shift circuit 13, thereby obtaining the solution (Y) shown in Table (4). .

Table (1) Table (2) Table (3)
Table (4) However, the following problems occur in the conventional digital calculation means as described above. In other words, the solution (Y) obtained by 5 K as described above
This is because the lower 2 bits of the complement 'data (-X) shown in Table (3) are truncated, so there is an error corresponding to the lower 2 bits of the digit truncated. . Tsumashi,
The lower two bits of the complement data (-X) shown in Table (3) are:
This is the part below the decimal point υ, and this complement data (-X) is 1
When expressed in 0-base, it becomes as shown in Table (5).

On the other hand, the solution (Y) obtained by dropping the lower two bits of the complement data (-X) shown in Table 1 (3) is all integers, and when expressed in decimal, it is as shown in Table (5). Therefore, the error (△) for the complement data (-X)K is as shown in the same table.
will occur. This error (△) is at most 0.7
5 (3/4LSB), and the average error is 0.38.
As a result, the calculation result becomes unreliable.

(Problems to be solved by the invention) As described above, in conventional digital calculation means, by dropping n bits or less, a large error occurs, making it impossible to obtain a reliable solution. There is a problem.

The present invention has been made in consideration of the above circumstances, and it is an object of the present invention to provide a very good digital arithmetic device that can obtain highly reliable solutions without causing large errors. purpose.

[Structure of the invention]

(Means for Solving the Problems) In other words, the digital calculation means according to the present invention inverts all bits of 1 m bits of input data (Xm - Xs) and converts n bits of the inverted data (Xm - xt). Below eyes (
: (n-X 1 ) is dropped. Then, the inverted data (Xm
'=Xl), the n-th bit data (X,) is added.

(Function) According to the above configuration, both the maximum error and the average error occurring in the solution can be suppressed to a smaller value than in the past, and a highly reliable solution can be obtained. It's a thing.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. In Figure 1, n-bit input data (
All bits of X) are inverted by the inverting circuit 14, and the inverted data (X) is shifted to the shift circuit 15 so that the bits below the nth bit (xn''=X, ) are digit-off. , the remaining digit loss data (Xm =
n+t) is calculated by the adding X circuit 16 with the n-th bit data (xn) of the inverted data (Xm-XI) to obtain 5% (Y).

In this case, the solution (Y) is It is expressed as

To explain specifically, as mentioned earlier, 3-bit input data (XS to XS) shown in Table (1) K is supplied,
And it is assumed that n = 2. Then, the input data (x
m~xt> is converted into inverted data (x,~Xt) as shown in Table (2)K by the inverting circuit x4j.

Then, by shifting this inverted data (Cxs to Xi) by 2 bits to the left in Table (2) by the shift circuit 15, the data with digit loss (xm
= Xn+1) is obtained. After that, the addition circuit 16
Therefore, the digit loss data (Xm −Xn+t) K
.

The 2nd bit data (X,) of the inverted data (XS to Xt) shown in Table (2) is added to K, Table (7) K
The solution (Y) shown is obtained.

Then, when the solution (Y) obtained as above is expressed in decimal and the error (△) for the complement data (-X) shown in Table (3) is calculated, as shown in Table (8). , the maximum error is reduced to 0.5 compared to the conventional method, and the average error is also reduced to 0.1.
3, which is about 1/3 of the conventional value.

Table (6) Table (7) Table (8) Note that the present invention is not limited to the above embodiments, and can be implemented with various modifications without departing from the gist thereof.

〔Effect of the invention〕

Therefore, as described in detail above, according to the present invention, it is possible to provide an extremely good digital arithmetic device that can obtain a highly 9-sided solution without causing a large error.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a digital calculation device according to the present invention, and FIG. 2 is a block diagram showing a conventional digital calculation means. 11... Inversion circuit, 12... Addition circuit, 13...
Shift circuit, 14... Inversion circuit, 15... Shift circuit, 16... Addition circuit. Applicant's agent Patent attorney Takehiko Suzue×(χ
m~χ1) Figure 1

Claims (1)

[Claims] -X・2^-^n (X: m-bit data x_m~x_
1, n: an integer satisfying 0≦n≦m) In a digital arithmetic device that performs an operation, all bits of the data X are inverted to generate inverted data @X@ (@x@_m to @x@_1). Inverting means and output data of this inverting means @X
Decrease digits below the nth bit of @ (@x_m@~@x_
n_+_1@), and the inverted data @
A digital arithmetic device comprising: an addition means for adding n-th bit data (@x_n@) of @.