JPS6367769B2 - - Google Patents

Info

Publication number
JPS6367769B2
JPS6367769B2 JP2917381A JP2917381A JPS6367769B2 JP S6367769 B2 JPS6367769 B2 JP S6367769B2 JP 2917381 A JP2917381 A JP 2917381A JP 2917381 A JP2917381 A JP 2917381A JP S6367769 B2 JPS6367769 B2 JP S6367769B2
Authority
JP
Japan
Prior art keywords
transistor
circuit
transistors
intermediate frequency
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2917381A
Other languages
Japanese (ja)
Other versions
JPS57142036A (en
Inventor
Tsuneo Ookubo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2917381A priority Critical patent/JPS57142036A/en
Publication of JPS57142036A publication Critical patent/JPS57142036A/en
Publication of JPS6367769B2 publication Critical patent/JPS6367769B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3052Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver

Landscapes

  • Control Of Amplification And Gain Control (AREA)
  • Superheterodyne Receivers (AREA)
  • Circuits Of Receivers In General (AREA)

Description

【発明の詳細な説明】 本発明はラジオ受信機その他の受信回路に係り
簡単な構成で大入力信号受信時の信号歪を少く
し、S/Nを著しく向上することができる優れた
受信回路を提供することを目的とするものであ
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to radio receivers and other receiving circuits, and provides an excellent receiving circuit that can reduce signal distortion when receiving large input signals and significantly improve S/N with a simple configuration. The purpose is to provide

そして、他の目的はAM・FM信号を共用化し
た中間周波増幅回路を用いてAM・FMの切換を
著しく簡単に行えるようにすることである。
Another purpose is to make switching between AM and FM extremely easy by using an intermediate frequency amplification circuit that shares AM and FM signals.

以下、本発明の受信回路における一実施例につ
いて図面とともに説明する。図において、1は
AM信号の周波数変換回路、2はこの周波数変換
回路1に加える局部発振出力を出力する局部発振
回路、3はAM・FM共用の中間周波増幅回路、
4はAM検波回路、5はFM中間周波増幅回路、
6はFM検波回路である。
An embodiment of the receiving circuit of the present invention will be described below with reference to the drawings. In the figure, 1 is
A frequency conversion circuit for AM signals; 2 is a local oscillation circuit that outputs a local oscillation output to be added to the frequency conversion circuit 1; 3 is an intermediate frequency amplification circuit for both AM and FM;
4 is an AM detection circuit, 5 is an FM intermediate frequency amplification circuit,
6 is an FM detection circuit.

まず最初にAM受信時の動作について説明す
る。スイツチ24をa側に投入してONすると
AM動作状態になる。アンテナコイル13とバリ
コン11とコンデンサ12によつて同調された受
信信号はAMの周波数変換回路1に加えられる。
一方局部発振回路2は同調用コイル19の2次巻
線が局部発振回路2内のトランジスタ202のコ
レクタとトランジスタ205のベースに抵抗21
4を介して接続されており、したがつてコイル1
9の2次巻線に現われた出力が抵抗214、トラ
ンジスタ205のベース・エミツタ抵抗204,
203、トランジスタ202のエミツタ・コレク
タと同一位相で増幅されて正帰還ループを作り発
振する。この発振信号はトランジスタ201のエ
ミツタフオロアを介して周波数変換回路1のトラ
ンジスタ103に加えられる。するとトランジス
タ103と102はエミツタ結合の差動増幅器と
して動作してトランジスタ103,102のコレ
クタには互いに逆位相の発振出力を取り出し、周
波数変換用トランジスタの104,105のエミ
ツタとトランジスタ106,107のエミツタに
発振信号が加わる。一方アンテナコイル13で受
信した信号はトランジスタ104,107のベー
スに加えられ、トランジスタ104,105およ
び106,107は互に結合されたエミツタから
の発振信号と混合され、トランジスタ105,1
07のコレクタに接続された中間周波コイル15
に中間周波数信号を取り出し、コンデンサ16、
抵抗20を介して中間周波増幅回路3のトランジ
スタ301のベースに加える。この中間周波増幅
回路3への中間周波数信号はトランジスタ30
1,302と312,313と321,322の
3つの差動増幅器によつて増幅され、トランジス
タ321,322のコレクタからAM検波用トラ
ンジスタ401,402のベースに加え、互い結
合されたエミツタにコンデンサ29を接続したト
ランジスタ401,402によつてAM検波さ
れ、抵抗30とコンデンサ31の低域通過フイル
タを通してAM検波出力を取り出す。このとき抵
抗317,318,316は直流バイヤスの負帰
還抵抗であり、コンデンサ22,23はバイパス
コンデンサを示す。
First, we will explain the operation during AM reception. When switch 24 is turned to side a and turned on,
AM mode is activated. The received signal tuned by the antenna coil 13, variable capacitor 11, and capacitor 12 is applied to the AM frequency conversion circuit 1.
On the other hand, in the local oscillation circuit 2, the secondary winding of the tuning coil 19 is connected to the resistor 21 at the collector of the transistor 202 and the base of the transistor 205 in the local oscillation circuit 2.
4 and thus coil 1
The output appearing at the secondary winding of 9 is connected to the resistor 214, the base-emitter resistor 204 of the transistor 205,
203, it is amplified in the same phase as the emitter and collector of the transistor 202 to create a positive feedback loop and oscillate. This oscillation signal is applied to the transistor 103 of the frequency conversion circuit 1 via the emitter follower of the transistor 201. Then, the transistors 103 and 102 operate as an emitter-coupled differential amplifier, and the collectors of the transistors 103 and 102 take out oscillation outputs with opposite phases to each other, and the emitters of the frequency conversion transistors 104 and 105 and the emitters of the transistors 106 and 107 An oscillation signal is added to. On the other hand, the signal received by the antenna coil 13 is applied to the bases of transistors 104, 107, and the transistors 104, 105 and 106, 107 are mixed with the oscillation signal from the emitters coupled to each other.
Intermediate frequency coil 15 connected to the collector of 07
The intermediate frequency signal is extracted from the capacitor 16,
It is applied to the base of the transistor 301 of the intermediate frequency amplification circuit 3 via the resistor 20. The intermediate frequency signal to this intermediate frequency amplification circuit 3 is transmitted to the transistor 30.
It is amplified by three differential amplifiers 1,302, 312, 313, and 321, 322, and a capacitor 29 is connected from the collectors of transistors 321, 322 to the bases of AM detection transistors 401, 402, and to the mutually coupled emitters. AM detection is performed by transistors 401 and 402 connected to each other, and an AM detection output is taken out through a low-pass filter consisting of a resistor 30 and a capacitor 31. At this time, resistors 317, 318, and 316 are DC bias negative feedback resistors, and capacitors 22 and 23 are bypass capacitors.

以上は小信号の動作であつて、次に大入力信号
のときについて説明する。小信号受信のとき、中
間周波増幅回路3の差動増幅用トランジスタ30
1,302の電流はトランジスタ306によつて
電流が供給され、AM周波数変換用のトランジス
タ104,105,106,107,102,1
03にはトランジスタ110によつて電流が供給
されている。そして、小信号受信のときはAM検
波用トランジスタ401,402に得られる検波
直流電圧が小さいが、大入力信号受信になると検
波直流電圧値が大きくなり、小信号時よりも高い
電圧となる。+Vccの電圧が10Vであるとし、抵
抗319,320の電圧降下が0.5Vであるとす
ると、AM検波用のトランジスタ401,402
のベース電圧は9.5Vである。そして信号のない
ときはトランジスタ401,402のベース・エ
ミツタ用の接触電位が約0.7Vとすると、このエ
ミツタは8.8Vとなる。一方抵抗415の電圧降
下が0.3Vであるように抵抗418の値を設定し
てトランジスタ417の電流を設定してあり、ダ
イオード416の接触電位が約0.7Vのためトラ
ンジスタ412のベースは約9.0Vである。トラ
ンジスタ411のベースが約8.8Vのためトラン
ジスタ411のベースの方がトランジスタ412
のベースよりも0.2V低く、よつて、トランジス
タ411が導通状態で、トランジスタ412は遮
断状態である。そのため抵抗413の電圧降下は
なく、トランジスタ305,123は遮断状態
で、トランジスタ306,110は導通状態であ
る。しかし、小信号入力信号から大入力信号を受
信するようになると、AM検波用トランジスタ4
01,402のエミツタ・トランジスタ411の
ベースの直流電圧が高くなり、今までの8.8Vか
ら9.0Vよりも高くなつてきて、トランジスタ4
11は次第に導通状態から遮断状態となり、トラ
ンジスタ412は遮断状態から導通状態となる。
すると抵抗413の電圧降下の値が大きくなつて
トランジスタ305が遮断状態から導通状態とな
つてくる。トランジスタ306のベースを約
1.2Vにバイヤスしている。これは2個のダイオ
ード419,420の電圧約1.4Vの電圧と抵抗
308と309で分割してトランジスタ306の
ベースを約1.2Vに設定している。又、トランジ
スタ110のベースは2個のダイオード212,
213の電圧1.4Vを加えている。そのため抵抗
413の電圧降下が1.2Vより高くなるとトラン
ジスタ305が導通してトランジスタ306が遮
断状態となつてくる。すると中間周波増幅回路3
のトランジスタ301,302の電流を減少する
ため中間周波数信号の利得が減少し、トランジス
タ321,322のコレクタの信号があまり大き
くなり振幅におさえることができる。さらに入力
信号が入るとトランジスタ306が完全に遮断状
態になつて中間周波増幅回路3の利得を制御でき
なくなり、検波に加わる中間周波信号がさらに大
きくなり検波直流電圧もさらに高くなり、抵抗4
13の電圧もさらに高くなる。そして抵抗413
の電圧降下が1.4V以上になるとトランジスタ1
23が導通状態となり、トランジスタ110の電
流が減少し、周波数変換回路1のトランジスタ1
02,103,104,105,106,107
の電流が減少し、周波数変換回路1の利得を減少
し、検波回路4に加わる中間周波信号をある値に
制御して、大入力信号時でも歪をなくした検波出
力を取り出すことができる。このときの特性を第
2図に示す。出力レベルではA点より中間周波増
幅回路3のトランジスタ305,306のAGC
が動作し始め、B点より周波数変換回路1のトラ
ンジスタ110,123のAGC動作が始まる。
そのため歪も小さい値で検波出来るものである。
このとき周波数変換回路1内の抵抗121,12
2はトランジスタ110の電流が減少したときの
トランジスタ104〜107のエミツタを正電位
にしてトランジスタ104〜107を完全に遮断
しやすくして利得の減少効果を大きくするために
作用するものである。そしてトランジスタ306
のベース電圧をトランジスタ110よりも低くし
ているのは中間周波増幅回路3のAGCを早くし、
周波数変換回路1のAGC動作を遅くするためで
ある。もし周波数変換回路1のAGC動作を早く
させ、中間周波増幅回路のAGCを遅く動作させ
るようにしたとすると、第3図の曲線Bのように
S/Nが悪い状態となる。これはS/Nが悪い間
に周波数変換回路1の利得を低下させるとS/N
がよくならない。このことより中間周波増幅回路
3の利得制御(AGC)を早く行つてS/Nがよ
くなつてから周波数変換回路1のAGCを動作さ
せるようにしているのである。よつて、この回路
では第3図の曲線AのようにS/Nのよい信号を
得ることができる。又抵抗211,124は電流
制限用の抵抗である。
The above is the operation for a small signal, and next we will explain the operation for a large input signal. When receiving a small signal, the differential amplification transistor 30 of the intermediate frequency amplification circuit 3
A current of 1,302 is supplied by a transistor 306, and a current of 1,302 is supplied by a transistor 104, 105, 106, 107, 102, 1 for AM frequency conversion.
03 is supplied with current by a transistor 110. When a small signal is received, the detected DC voltage obtained by the AM detection transistors 401 and 402 is small, but when a large input signal is received, the detected DC voltage value increases and becomes a higher voltage than when the small signal is received. Assuming that the voltage of +Vcc is 10V and the voltage drop across resistors 319 and 320 is 0.5V, AM detection transistors 401 and 402
The base voltage of is 9.5V. When there is no signal, if the base-emitter contact potential of transistors 401 and 402 is about 0.7V, the emitter voltage becomes 8.8V. On the other hand, the value of the resistor 418 is set to set the current of the transistor 417 so that the voltage drop across the resistor 415 is 0.3V, and since the contact potential of the diode 416 is approximately 0.7V, the base of the transistor 412 is approximately 9.0V. It is. Since the base of transistor 411 is about 8.8V, the base of transistor 411 is higher than transistor 412.
0.2V lower than the base of , so transistor 411 is conducting and transistor 412 is off. Therefore, there is no voltage drop across the resistor 413, the transistors 305 and 123 are in a cut-off state, and the transistors 306 and 110 are in a conductive state. However, when receiving a large input signal from a small signal input signal, the AM detection transistor 4
The DC voltage at the base of the emitter transistor 411 of 01,402 has become higher than the current 8.8V to 9.0V, and the transistor 4
11 gradually changes from a conductive state to a cut-off state, and the transistor 412 changes from a cut-off state to a conductive state.
Then, the value of the voltage drop across the resistor 413 increases, and the transistor 305 changes from a cut-off state to a conduction state. The base of transistor 306 is approximately
It is biased to 1.2V. This is done by dividing the voltage of about 1.4V between the two diodes 419 and 420 and the resistors 308 and 309 to set the base of the transistor 306 at about 1.2V. Further, the base of the transistor 110 is connected to two diodes 212,
213 voltage of 1.4V is applied. Therefore, when the voltage drop across resistor 413 becomes higher than 1.2V, transistor 305 becomes conductive and transistor 306 becomes cut off. Then, intermediate frequency amplification circuit 3
Since the currents in the transistors 301 and 302 are reduced, the gain of the intermediate frequency signal is reduced, and the signals at the collectors of the transistors 321 and 322 become too large and can be suppressed in amplitude. When an input signal is further input, the transistor 306 is completely cut off, making it impossible to control the gain of the intermediate frequency amplifier circuit 3, the intermediate frequency signal applied to the detection becomes even larger, the detected DC voltage becomes even higher, and the resistor 306
The voltage at No. 13 also becomes higher. and resistance 413
When the voltage drop becomes 1.4V or more, transistor 1
23 becomes conductive, the current of the transistor 110 decreases, and the transistor 1 of the frequency conversion circuit 1
02, 103, 104, 105, 106, 107
The current decreases, the gain of the frequency conversion circuit 1 is reduced, and the intermediate frequency signal applied to the detection circuit 4 is controlled to a certain value, thereby making it possible to extract a distortion-free detection output even in the case of a large input signal. The characteristics at this time are shown in FIG. At the output level, AGC of transistors 305 and 306 of intermediate frequency amplification circuit 3 starts from point A.
starts operating, and the AGC operation of the transistors 110 and 123 of the frequency conversion circuit 1 starts from point B.
Therefore, the distortion can be detected with a small value.
At this time, the resistors 121 and 12 in the frequency conversion circuit 1
2 functions to make it easier to completely shut off the transistors 104 to 107 by setting the emitters of the transistors 104 to 107 at a positive potential when the current in the transistor 110 decreases, thereby increasing the gain reduction effect. and transistor 306
The reason why the base voltage of the transistor 110 is lower than that of the transistor 110 is to speed up the AGC of the intermediate frequency amplification circuit 3.
This is to slow down the AGC operation of the frequency conversion circuit 1. If the AGC operation of the frequency conversion circuit 1 is made to operate faster and the AGC operation of the intermediate frequency amplifier circuit is made to operate later, the S/N will be in a poor state as shown by curve B in FIG. 3. This is because if the gain of frequency conversion circuit 1 is lowered while the S/N is poor, the S/N
doesn't get better. For this reason, the gain control (AGC) of the intermediate frequency amplifier circuit 3 is performed early and the AGC of the frequency conversion circuit 1 is operated only after the S/N ratio becomes good. Therefore, with this circuit, a signal with a good S/N ratio can be obtained as shown by curve A in FIG. Further, the resistors 211 and 124 are current limiting resistors.

次にFM動作について説明する。スイツチ24
をb側に投入することにより、このb側からFM
チユーナ部への電源供給を行なう。この切換えに
より、チユーナ部で受信した信号を中間周波数信
号に変換して中間周波数信号(ここでは10.7M
Hz)をA点に加える。A点の信号は抵抗21を介
して中間周波増幅回路3に加え、3個の差動増幅
器のトランジスタ301,302,312,31
3,321,322で増幅し、トランジスタ32
1,322のコレクタからFM中間周波増幅回路
5のトランジスタ505,506のコレクタより
FM検波回路6のトランジスタ509,510の
ベースに加えている。FM検波回路6を構成する
トランジスタ522,523にトランジスタ50
9,510のエミツタより加え、一方トランジス
タ510のエミツタより位相変化用コンデンサ5
11によつて位相を変えてトランジスタ524の
ベースに加える。このトランジスタ524ベース
と+Vccの間に同調回路25を設け、中間周波数
信号10.7MHzに同調して中間周波数からのFM復
調による周波数変化によつて位相を正負に変化さ
せる。位相変化用コンデンサ511によつてトラ
ンジスタ510のエミツタの信号より位相を進
め、これを中心に同調回路25によつて正負に変
化する周波数で位相変化をさせている。この信号
はトランジスタ524のエミツタよりトランジス
タ525,528に加えている、一方トランジス
タ510,509のエミツタの信号は逆位相でト
ランジスタ522,523は互い逆極性でON―
OFFし、、このトランジスタ522,523のコ
レクタをトランジスタ525,526と527,
528のエミツタに加え、トランジスタ524か
らの信号によつて差動的にトランジスタ525,
526と527,528がON―OFFし、トラン
ジスタ522,523のON―OFFとの掛算的ス
イツチングによりFM検波され、トランジスタ5
26,528のコレクタの抵抗529に取り出
し、コンデンサ26でバイパスして検波出力信号
を出力端27より取り出すことができる。このと
きトランジスタ524のベースは直流的には+
Vccと同電位となるように+Vccから同調回路2
5内のコイルで接続されている。そのためトラン
ジスタ524のエミツタに接続されているトラン
ジスタ525,528のベースは+Vccより0.7V
低い電圧である。これはほぼ同じ電圧をトランジ
スタ526,527にも加えるためにダイオード
530を設け、トランジスタ520で電流を流し
ている。このダイオード530はトランジスタの
ベース・コレクタを+Vccとし、エミツタをトラ
ンジスタ526,527に接続しても同じ動作を
するものである。このとき、スイツチ24をb側
に投入しているためAM周波数変換回路1と局部
発振回路2に電圧が加わらずAM動作をしないで
FMのみを動作させることができる。又、このと
きトランジスタ305のコレクタは抵抗211を
介してAM周波数変換回路1と局部発振回路2の
電源に接続されているためにトランジスタ305
は遮断状態となり、FM動作時にはトランジスタ
306の電流は一定でAGC動作をしないように
している。FM受信時でもAM検波用トランジス
タ401,402は動作し、トランジスタ41
1,412も動作し、コンデンサ28の両端には
入力信号が大きくなると直流電圧信号を取出すこ
とができるので同調指示器の指示信号として用い
ることもできる。一方AM動作時にはトランジス
タ543のベースに抵抗542を介して電圧が加
わつているのでトランジスタ543がONしてト
ランジスタ507,512,513,516,5
18,520がOFFとなり、FM中間周波増幅回
路5とFM検波回路6は動作しない。そして、
FM時にはトランジスタ543のベースに電圧が
加わらないため、トランジスタ507,512,
513,516,518,520がONとなり、
FM中間周波増幅回路5とFM検波回路6が動作
するように電流が流れるようにしている。そのた
めにFM,AMの切換えのためのスイツチ回路が
少くてよい利点を持つている。そして、この一点
鎖線内をIC化することが簡単になる利点がある。
Next, FM operation will be explained. switch 24
By injecting into the b side, FM from this b side
Supplies power to the tuner section. By this switching, the signal received by the tuner section is converted into an intermediate frequency signal (10.7M in this case).
Hz) to point A. The signal at point A is applied to the intermediate frequency amplification circuit 3 via the resistor 21, and also to the transistors 301, 302, 312, 31 of the three differential amplifiers.
3,321,322, and transistor 32
From the collector of transistors 505 and 506 of the FM intermediate frequency amplification circuit 5
It is added to the bases of transistors 509 and 510 of the FM detection circuit 6. The transistor 50 is added to the transistors 522 and 523 that constitute the FM detection circuit 6.
9,510, and a phase change capacitor 5 from the emitter of transistor 510.
11 and applied to the base of transistor 524. A tuning circuit 25 is provided between the base of this transistor 524 and +Vcc, and is tuned to an intermediate frequency signal of 10.7 MHz to change the phase to positive or negative depending on the frequency change due to FM demodulation from the intermediate frequency. The phase change capacitor 511 advances the phase of the signal at the emitter of the transistor 510, and the tuning circuit 25 changes the phase around this at a frequency that changes from positive to negative. This signal is applied to transistors 525 and 528 from the emitter of transistor 524. On the other hand, the signals at the emitters of transistors 510 and 509 are in opposite phase, and transistors 522 and 523 are turned on with opposite polarity.
OFF, and the collectors of these transistors 522 and 523 are connected to transistors 525, 526 and 527,
In addition to the emitter of transistor 528, a signal from transistor 524 differentially connects transistors 525,
526, 527, and 528 are turned ON and OFF, and FM detection is performed by multiplicative switching of ON and OFF of transistors 522 and 523.
The detection output signal can be taken out from the output end 27 by taking out the detection signal through the resistor 529 of the collector of 26 and 528, and by bypassing it with the capacitor 26. At this time, the base of the transistor 524 is +
Tuning circuit 2 from +Vcc so that it has the same potential as Vcc.
It is connected by the coil inside 5. Therefore, the bases of transistors 525 and 528 connected to the emitter of transistor 524 are 0.7V higher than +Vcc.
Low voltage. A diode 530 is provided to apply approximately the same voltage to transistors 526 and 527, and current flows through transistor 520. This diode 530 operates in the same way even if the base and collector of the transistor are set to +Vcc and the emitter is connected to the transistors 526 and 527. At this time, since the switch 24 is turned to the b side, no voltage is applied to the AM frequency conversion circuit 1 and the local oscillation circuit 2, so no AM operation is performed.
Only FM can be operated. Also, at this time, since the collector of the transistor 305 is connected to the power supply of the AM frequency conversion circuit 1 and the local oscillation circuit 2 via the resistor 211, the transistor 305
is in a cut-off state, and the current of the transistor 306 is constant during FM operation so that AGC operation is not performed. AM detection transistors 401 and 402 operate even during FM reception, and transistor 41
1,412 also operates, and since a DC voltage signal can be extracted from both ends of the capacitor 28 when the input signal becomes large, it can also be used as an instruction signal for a tuning indicator. On the other hand, during AM operation, voltage is applied to the base of the transistor 543 via the resistor 542, so the transistor 543 is turned on and the transistors 507, 512, 513, 516, 5
18 and 520 are turned off, and the FM intermediate frequency amplification circuit 5 and the FM detection circuit 6 do not operate. and,
During FM, no voltage is applied to the base of transistor 543, so transistors 507, 512,
513, 516, 518, 520 are turned on,
A current is made to flow so that the FM intermediate frequency amplification circuit 5 and the FM detection circuit 6 operate. Therefore, it has the advantage of requiring fewer switch circuits for switching between FM and AM. There is an advantage that it is easy to convert the area within this dashed line into an IC.

以上のように本発明によれば、大入力信号受信
時の歪信号を少なくして、S/N比を著しく向上
することができる利点を有するものである。
As described above, the present invention has the advantage of reducing distortion signals when receiving a large input signal and significantly improving the S/N ratio.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の受信回路の1実施例を示す電
気的結線図、第2図、第3図はその動作説明図で
ある。1はAM周波数変換回路、2は局部発振回
路、3はAM,FM中間周波増幅器、4はAM検
波回路、5はFM中間周波増幅器、6はFM検波
回路。
FIG. 1 is an electrical connection diagram showing one embodiment of the receiving circuit of the present invention, and FIGS. 2 and 3 are diagrams explaining its operation. 1 is an AM frequency conversion circuit, 2 is a local oscillation circuit, 3 is an AM/FM intermediate frequency amplifier, 4 is an AM detection circuit, 5 is an FM intermediate frequency amplifier, and 6 is an FM detection circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 AM周波数変換回路と、少くとも2つ以上の
第1と第2の差動増幅回路を有した中間周波増幅
回路とAM検波回路とを有し、前記中間周波増幅
回路を構成する第1の差動増幅器に電流を供給す
る第1のトランジスタのエミツタにエミツタを互
いに結合した第2のトランジスタと、前記AM周
波数変換回路に電流を供給する第3のトランジス
タのエミツタにエミツタを互いに結合した第4の
トランジスタとを備えてなり、第2のトランジス
タと第4のトランジスタのベースに前記AM検波
回路の出力に得られた直流信号を加えて上記中間
周波増幅回路およびAM周波数変換回路の利得を
制御するように構成すると共に、第1のトランジ
スタのベースバイヤスを第3のトランジスタのベ
ースバイアスよりも低い電圧に設定して前記中間
周波増幅回路の利得制御をAM周波数変換回路の
利得制御に先立つて行わせるように構成したこと
を特徴とする受信回路。
1 An AM frequency conversion circuit, an intermediate frequency amplification circuit having at least two or more first and second differential amplification circuits, and an AM detection circuit, and a first a second transistor whose emitters are coupled to each other to the emitters of the first transistor that supplies current to the differential amplifier; and a fourth transistor whose emitters are coupled to the emitters of the third transistor that supplies current to the AM frequency conversion circuit. and a DC signal obtained from the output of the AM detection circuit is added to the bases of the second transistor and the fourth transistor to control the gains of the intermediate frequency amplification circuit and the AM frequency conversion circuit. In addition, the base bias of the first transistor is set to a lower voltage than the base bias of the third transistor, so that the gain control of the intermediate frequency amplifier circuit is performed prior to the gain control of the AM frequency conversion circuit. A receiving circuit characterized in that it is configured as follows.
JP2917381A 1981-02-27 1981-02-27 Reception circuit Granted JPS57142036A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2917381A JPS57142036A (en) 1981-02-27 1981-02-27 Reception circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2917381A JPS57142036A (en) 1981-02-27 1981-02-27 Reception circuit

Publications (2)

Publication Number Publication Date
JPS57142036A JPS57142036A (en) 1982-09-02
JPS6367769B2 true JPS6367769B2 (en) 1988-12-27

Family

ID=12268838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2917381A Granted JPS57142036A (en) 1981-02-27 1981-02-27 Reception circuit

Country Status (1)

Country Link
JP (1) JPS57142036A (en)

Also Published As

Publication number Publication date
JPS57142036A (en) 1982-09-02

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