JPS6362895B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor element using silicon or germanium.

Conventional Structure and Problems Conventionally, semiconductor elements using silicon or germanium have used single crystals. A semiconductor device having a larger junction area than the electrode area has been manufactured by the method shown in FIG. That is, this method takes advantage of the fact that the etching rate varies greatly depending on the plane orientation of the crystal. For example, (100) single crystal silicon 1 is oxidized to form a SiO ₂ layer 2 on its surface (a).
Appropriately patterned (b) and patterned
When SiO ₂ is used as a mask and placed in a NaOH solution, for example, (110) is selectively etched, forming grooves 3 (c). Remove SiO ₂ used as a mask
(d), silicon 4 having a different conductivity type from the single crystal silicon substrate 1 is epitaxially grown, and electrodes 5, 6 are formed.
(e). In this way, a diode with a larger junction area than the electrode area is created.

However, in this case, a single crystal wafer must be used as the substrate and patterning must be performed, and many steps such as epitaxial growth must be performed.

OBJECTS OF THE INVENTION The present invention provides a manufacturing method for easily manufacturing a semiconductor element having a bonding area larger than the electrode area using fewer steps.

Structure of the Invention The present invention relates to a method for manufacturing a non-linear semiconductor element such as a varistor, which includes a step of stacking and assembling plate-shaped semiconductors of different conductivity types to form a final semiconductor element configuration, and a process of stacking and assembling plate-shaped semiconductors of different conductivity types, and a process of adjusting the melting point of the semiconductor. The method includes a step of stretching the plate-shaped semiconductor aggregate by applying a force parallel to the stacked surfaces while heating, and a step of cutting the aggregate in a direction intersecting the stretched direction.

DESCRIPTION OF EMBODIMENTS FIG. 2 shows several configuration examples of semiconductor devices produced by the manufacturing method of the present invention. 11 is an n-type semiconductor, 12
is a p-type semiconductor, and 13 is an i-type semiconductor. In the case of FIG. 2a, if electrodes are formed on a surface 14 and a surface 15 substantially parallel thereto, a diode with a larger junction area than the electrode area is constructed. The same holds true when electrodes are formed on the surface 16 and the surface 17 substantially parallel to the surface 16. Surface 18 showing the cross section and surface 1 opposite thereto
When forming electrodes on surfaces 18 and 19,
Different types of electrodes are formed. For example, taking silicon as an example, on one side there is a material that exhibits resistive contact characteristics for n-type silicon and forms a potential barrier for p-type silicon, ie, for example, Al-Au-P-. Au―Sb, Au―Sb―
Si, Au-Sn, Bi, Cd-Sb, Ga-Sn, Ge-Sb,
K, Li, Mg, Na, Pb-Sb-Sn, Sb, Te, n ⁺
Type Si etc. The other side has Al-Pb, Au-B, Cd, Ga, which exhibits a resistive contact to p-type silicon and forms a potential barrier to n-type silicon.
Ge, graphite, In-Pb, Pb, Rh, p ⁺ type Si, etc. are used. With such a configuration, a diode is formed whose junction area is much larger than the electrode area even when viewed from the element cross section.

In the case of FIG. 2b, the surface 20 and the opposite surface 21
When an electrode is formed on the diode, a pnpn diode is formed. In the case of FIG. 2c, when electrodes are formed on the surface 22 and the opposite surface 23, a semiconductor element with a nipin structure is constructed.

In the case of FIG. 2a, in any case of electrode formation, the junction area can be larger than the electrode area, so a large amount of current can flow per unit volume, and a small element can operate with high power. Heat generation due to resistance in the semiconductor can be avoided by embedding metal in part of the semiconductor.

In the case of FIG. 2b, the electrode 20 has a positive potential, and the electrode 21
When a negative potential is applied to the 1st and 2nd layers of pnpn,
The third and fourth layers are forward biased, while the second and third layers are biased in the opposite direction. Conversely, when a negative potential is applied to the electrode 20 and a positive potential is applied to the electrode 21, the second and third layers are biased in the forward direction, but the first and second layers and the third and fourth layers are biased in the forward direction. is in the opposite direction. In this way, changing the direction of the voltage applied to the electrode will result in a reverse biased diode, but the number of diodes will behave differently, so if you use near the breakdown voltage, or the current after the breakdown When using this, a semiconductor device with asymmetric electrical characteristics can be obtained. However, in FIG. 2b, it goes without saying that if the number of p-type layers or n-type layers is increased to pnpnp or npnpn, almost symmetrical electrical characteristics can be obtained.

Furthermore, in a pnpn diode, the second and third layers are made of a metal that has resistance contact with both the p-type layer and the n-type layer, and does not have an extremely large diffusion constant near the melting point of silicon, such as Al, Mo, or Sn. If you put it in between, except when forming electrodes on the cross section, that is, when forming electrodes on surfaces 18 and 19,
The configuration is similar to that of two pn diodes connected in series. The operation in this case will be explained.
Even if a single silicon pn diode is forward biased, almost no current will flow up to about 0.5V. Shows nonlinear current-voltage characteristics. By connecting n diodes in series, it is possible to create a diode in which no current flows even when forward biased to about 0.5×n (V). Therefore, in the case of FIG. 2b, in the structure in which a metal is inserted, the forward current does not flow unless it exceeds about 1.

In the case of Figure 2c, the configuration is nipin, but
Even if a positive or negative bias voltage is applied to either electrode on the surface 22 or the surface 23, the reverse direction characteristic is exhibited.
In this case as well, the element utilizes current near the breakdown voltage or after the breakdown, but the breakdown voltage can be changed by changing the thickness of the i-type layer.

Next, an embodiment of the manufacturing method of the present invention for manufacturing a semiconductor device as shown in FIG. 2 will be described. FIG. 3 sequentially shows the steps of the method for manufacturing a semiconductor device of the present invention.

A case using silicon as the semiconductor material will be described below.

Prepare silicon plates and assemble them so that they have the same ratio as the final semiconductor device (a). 30
is p-type Si, and 31 is n-type Si. If metal is inserted between the two, the combination becomes somewhat complicated, but a metal plate 32 is inserted as shown in FIG. 3a'.

The combined plate-shaped silicon combination is heated in an inert gas, hydrogen gas, or a vacuum of 10 ^-4 Torr or less using, for example, a high-frequency heater 33 to about 1400°C, which is around the melting point of silicon, or lower, and then heated as shown by the arrow 34. Obtain a semiconductor by pressing in the direction
(b). In addition, in order to remove the stress in the semiconductor after pulling it, it is preferable to anneal it in an inert gas, hydrogen gas, or a vacuum of 10 ^-4 Torr or less at a temperature below the heating temperature mentioned above. . It goes without saying that the heating and pulling conditions must be chosen such that diffusion of impurities or metals is negligible.

When forming an electrode, it is not necessary in the case of FIG. 3a', but in the case of FIG. 3a, it is sufficient to vapor-deposit or plate a metal after drawing it thinly.

The elongated semiconductor is cut into appropriate lengths to form devices (FIG. 3c). When forming electrodes on the cross section, metal is vapor-deposited or plated after cutting. In this case, since the cross section is small, it is easier to process by cutting diagonally than by cutting perpendicularly to the length direction because the cross-sectional area becomes wider. 35 is a cutter for cutting, and 36 is a lump of thinly stretched semiconductor.

Figure 4 shows an outline of the specific manufacturing equipment. An upper hanging support stand 101 is movably provided in the tension furnace 100, and a molybdenum wire 102 is attached to the upper hanging support stand 101.
is attached, a notch is made in the semiconductor raw material rod 103, and the semiconductor raw material rod 103 is hung. This is heated by the preheating heater 104.
First heat to 600-1000℃. Next, high frequency is applied from the coaxial cable 105, and the semiconductor raw material rod 103
A work coil 106 arranged to surround the
is heated to a temperature near the melting point of Si. The situation can be confirmed through the observation window 107. When the semiconductor raw material rod 103 is heated by the work coil 106 from the middle, it suddenly becomes stretched as shown in the figure from a temperature thought to be near the melting point of Si, and a stretched semiconductor rod 108 is completed. If the work coil 106 is heated beyond the state shown in the figure, it will break, so the heating will stop midway. Thereafter, the upper suspension support 101 is slowly lowered, and annealing is performed using an annealing heater 109 at a temperature of 600 to 1000°C.

In this way, a wire-shaped semiconductor is completed.

Since it is difficult to heat the semiconductor raw material rod 103 in pieces before putting it into the tension furnace 100, if the metal is Al, it is necessary to take measures such as heat treatment in a hydrogen atmosphere at 400 to 600 degrees Celsius and bonding. . The tensile strength is determined by which part of the raw material rod 103 is heated by the work coil 106. That is, the longer the portion 110 remaining as the raw material rod is, the greater the tensile force will be. As a result, the length of the stretched semiconductor rod 108 also changes, and the ratio of stretching the semiconductor rod 108 to a smaller diameter also changes. Further, the thickness of the stretched semiconductor rod 108 was different between the upper and lower sides.

The size of the semiconductor raw material rod is that the polycrystalline silicon plate is approximately 0.5 mm thick, the metal is approximately 0.1 mm, and the total thickness is 2 to 3 mm.
mm. Although the longer the length is, the more advantageous it is in terms of heat uniformity, etc., it was set to 100 mm in consideration of constraints such as processing accuracy.

The characteristics of the diode created by this method confirmed that power control was possible, and the ON/OFF ratio was 1.1.
It was about 1.5.

Effects of the Invention Since the semiconductor manufactured by the manufacturing method of the present invention has a three-dimensional structure and a junction area larger than the electrode area, a large amount of power can be controlled with a small volume. Further, an element having varistor characteristics can be manufactured through a simple process, that is, a patterning process is not required in the present invention. Furthermore, polycrystalline or amorphous materials, which are cheaper than single crystals, can be used satisfactorily as starting materials.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a manufacturing process of a conventional example, FIG. 2 is a schematic oblique cross-sectional view of several structural examples of a semiconductor device according to the present invention, and FIG. 3 is a diagram showing a method for manufacturing a semiconductor device according to an embodiment of the present invention. The process diagram, FIG. 4, is a schematic diagram of the manufacturing apparatus used in the present invention. 1...Silicon single crystal substrate, 2...Silicon oxide film, 3...Selectively etched hole, 4...
...Silicon epitaxial layer, 5,6...electrode,
11,30...p-type silicon, 12,31...n
Type silicon, 13...I type silicon, 14-23
...Semiconductor element surface, 32...Metal plate, 33...
High frequency heater, 34... pull direction, 35
...Cutting machine, 36...A device that winds up thinly stretched semiconductors.

Claims (1)

[Claims] 1. After stacking and assembling plate-shaped semiconductors of different conductivity types and arranging them into the final semiconductor device configuration,
While heating the semiconductor aggregate to a temperature below its melting point, applying a force parallel to the stacked surfaces of the plate-shaped semiconductors to stretch them, so as to make the cross-sectional area smaller than that of the stacked plate-shaped semiconductor aggregates, A method for manufacturing a semiconductor device, characterized in that a plurality of semiconductor devices are obtained by cutting in a direction intersecting the direction in which the force is applied and stretched. 2. The semiconductor device according to claim 1, characterized in that the stacked semiconductor assembly is stretched by applying force while heating in an inert gas, hydrogen gas, or in a vacuum of 10 ^-4 Torr or less. Manufacturing method. 3 After applying force and stretching while heating, the semiconductor assembly is placed in an inert gas, hydrogen gas or
3. The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor device is heated again at a lower temperature than the heating temperature in a vacuum of 10 ⁻⁴ Torr or less, and then slowly cooled.