JPS6362490A - Detection circuit horizontal synchronizing signal - Google Patents

Abstract

PURPOSE:To detect a horizontal synchronizing signal at a high response speed and stably even at the time of a variable speed reproduction by obtaining a reproducing synchronizing signal from a tape speed, and detecting a separated synchronizing signal, nearly equal to this reproducing synchronizing signal, as the horizontal synchronizing signal. CONSTITUTION:A reproduced video signal, inputted from an input terminal 1, is given to a synchronizing signal separation circuit 2, and a synchronizing signal is separated. A pulse generation circuit 3 outputs a pulse signal with a prescribed pulse width from the leading edge of this separated synchronizing signal, and loads it to a counter 7. Besides, a second counter 5 counts the number of pulses of a tape speed signal from an input terminal 4 for a prescribed time, and addresses a ROM 6 by this counted value. A relation between the tape speed signal and a reproducing horizontal synchronizing signal period (forecast tape H) is previously stored in the ROM 6, and this data is loaded to a counter 7. A gate signal, depending on the forecast tape H, is generated from the outputted data of the counter 7, and the horizontal synchronizing signal with the prescribed pulse width is outputted from a gate circuit 9.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a pulse train containing a noise component, such as a synchronizing signal pulse train separated from a reproduced video signal of a rotating head helical scan type magnetic recording/reproducing device (hereinafter referred to as VTR). The present invention relates to a device for detecting a horizontal synchronization signal from a signal train.

2. Description of the Related Art As shown in FIG. 3, a conventional horizontal synchronization signal detection circuit separates a synchronization signal from a reproduced video signal input from an input terminal 18 by amplitude separation in a synchronization signal separation circuit 19, and generates the separated synchronization signal. is supplied to the AFC circuit 20 to generate a gate pulse and transmit the reproduced horizontal synchronization signal to the gate circuit 2.
There is something to be gained by gate at 1. Also, JP-A-65-7
As disclosed in Publication No. 9583, the pulse interval of the separated synchronizing signal is counted by a counter, and the reproduced horizontal synchronizing signal period (tape H) detected from substantially equal counter data consecutively for a predetermined number of times is stored in a memory. There is a method that generates a gate pulse to extract the pulse from the horizontal synchronizing signal.

Problems to be Solved by the Invention However, in the configuration using the AFC circuit described above, during variable speed playback, the AFC circuit is supplied with noise components that are played back across tracks, and the period of the horizontal synchronizing signal also changes significantly. It has been difficult to detect horizontal synchronization signals stably and with a fast response speed. In addition, in the configuration in which the gate pulse is generated by counting the pulse interval of the separated synchronization signal and detecting tape H, the circuit configuration is complicated, and since tape H is detected from the playback signal, the playback signal of the VTR is When there are many dropouts or immediately after tracks are crossed during variable speed playback, there are problems in that detection of the tape H malfunctions and it takes time to pull in the tape.

In view of this, it is an object of the present invention to provide a horizontal synchronization signal detection circuit that has a fast response speed and stably detects a horizontal synchronization signal even when there are many dropouts or during variable speed playback.

Means for Solving the Problems The present invention provides means for synchronously separating a reproduced video signal in a rotating head helical scan type magnetic recording and reproducing apparatus, and a means for synchronously separating the horizontal synchronization signal period of the reproduced video signal from a tape speed signal. means for predicting a predicted horizontal synchronizing signal period (predicted tape H) shown in FIG. The horizontal synchronizing signal detection circuit includes at least means for obtaining a horizontal synchronizing signal from the separated synchronizing signal when the pulse intervals are substantially equal.

Function The present invention uses the above-described configuration to obtain a predicted tape H from a tape speed signal and detects a separated synchronization signal that is approximately equal to the predicted tape H as a horizontal synchronization signal. Even during variable speed playback, the response speed is fast and the horizontal synchronization signal can be detected stably.

Embodiment FIG. 1 shows a block diagram of a horizontal synchronization signal detection circuit in an embodiment of the present invention. In the figure, 1 is an input terminal into which the reproduced video signal is input, 2 is a sync signal separation circuit that separates the sync signal by amplitude separation, and 3 is from the rising edge 9 (leading edge of the horizontal sync signal) of the separated sync signal. A pulse generation circuit generates a pulse signal with a predetermined clock signal width; 4 is an input terminal to which a capstan motor rotational speed detection signal, which is a tape speed signal, is input; 6 counts the number of pulses of the tape speed signal within a predetermined period of time; a second counter; 6 is a ROM (read only memory) that converts the output signal of the second counter into data indicating predicted data H; 7 is a predetermined clock signal that loads the data on the predicted tape with the pulse signal; 8 is a gate signal generation circuit that generates first and second gate signals from the output of the counter; 9 is a gate signal generation circuit that generates the separated synchronization signal only during the gate period of the second gate signal; A horizontal synchronization signal gate circuit generates a horizontal synchronization signal of a predetermined width at the rising edge; 11 is an input terminal for a dropout signal indicating dropout of the reproduced video signal; 12 is a dropout signal generated from the dropout signal and the gate signal generation circuit 8; from the first gate signal to the pulse generation port N.
This is an AND gate that generates a prohibition signal that prohibits the operation of 13. FIG. 2 is an operational waveform diagram of each part of the horizontal synchronization signal detection circuit in the embodiment of the present invention. In the same figure, 1
3 is the waveform of the separated synchronizing signal output from the synchronizing signal separation circuit 2, 14 is the waveform of the pulse signal output from the pulse generating circuit 3, and 15 is the waveform of the pulse signal output from the gate signal generating circuit 8 and the operation of the pulse generating circuit 3. 16 is the waveform of the second gate signal output from the gate signal generation circuit 8 to obtain the horizontal synchronization signal, and 1 R is the waveform of the detected horizontal synchronization signal output to the output terminal 10. It is. A and b of the separated synchronization signal 13 are noise components.

The operation of the embodiment configured as above will be explained.

The reproduced video signal inputted from the input terminal 1 is separated into a synchronizing signal by amplitude separation at the synchronizing signal separation port w&2. At this time, if separation is also performed by pulse width detection, more accurate separation can be achieved. The pulse generating circuit 3 generates a pulse signal having a predetermined clock signal width from the rising edge of the separated synchronizing signal 13 (leading edge of the horizontal synchronizing signal), and loads the counter 7 .

The second counter 6 counts the number of pulses of the tape speed signal input from the input terminal 4 in a predetermined time period, and addresses the ROM 6 with this counted value. Data indicating the relationship between the tape speed signal and the predicted tape H is stored in advance in the ROMe, and the first counter 7 loads this data to count the predetermined clock signal. The data in the ROM 6 is as follows: Tape H □ XN/lN 0 (ST 1) Number of horizontal scanning periods recorded in a video track ST - Ratio of playback tape speed to normal playback tape speed αH; Start position between adjacent video tracks on the tape of a rotating head helical scan type magnetic recording/playback device Ratio between the difference and the length of one horizontal scanning period on the video track 5 = fT/f○ Here, IT; Frequency fO of the tape speed signal (capstan motor rotation speed detection signal) during playback; Obtained during normal playback Based on the relationship expressed by the following two equations of the frequency of the tape speed signal (rotational speed detection signal of the capstan motor), the count value of the first counter 7 will indicate a predetermined value at the timing when the next horizontal synchronization signal is detected. This is counter load data.

The gate signal generating circuit 8 generates the first . and generate a second gate signal. This first gate signal 16 maintains a low level c (c (prediction tape H)) for a predetermined period from loading of the first counter 7 based on the prediction table H data, and prevents the generation of a pulse signal in the pulse generation circuit 3. the separated synchronization signal 1 with a pulse interval longer than this prohibition period C;
Gate only 3. Therefore, the separated synchronization signal 13
Due to the noise a, the pulse generation circuit 3 does not generate a pulse during the horizontal synchronization signal period. Further, the operation of the pulse generating circuit 3 is also inhibited by a dropout signal of the reproduced video signal inputted from the input terminal 11. In the horizontal synchronization signal gate circuit 9, the second gate signal 16 gates the separated synchronization signal 13 for a predetermined period d to generate a horizontal synchronization signal of a predetermined width, and outputs a detected horizontal synchronization signal 17 to an output terminal 10. let Therefore, the horizontal synchronization signal is not generated due to the noise b of the separated synchronization signal 13. The second gate signal 16 is the prediction data H.
Based on the data, the prediction tape H(f) becomes high level for a predetermined period d (d=fe, e), and the separation synchronization signal 13 is gated only during this period. It is reset at the timing when the separation synchronization signal 13 is gated.

In this embodiment, the tape speed signal is the rotational speed detection signal of the capstan motor of the VTR, but it may also be a capstan motor rotational speed control reference signal, a roller rotational speed control reference signal, or a detection signal.

Alternatively, the second counter may detect the cycle of the tape speed signal as a reproduction control signal reproduced from the control track.

As described above, according to this embodiment, the tape speed signal (
A prediction tape H is obtained from the frequency of the capstan motor rotational speed detection signal), and based on this data, a pulse is generated to inhibit the operation of the separated synchronization signal within a predetermined period and load a counter, and based on the data, Since the horizontal synchronization signal with a predetermined width is obtained by gating the separated synchronization signal only within a predetermined period, the response speed is fast and the horizontal synchronization signal can be detected stably even when there is a lot of noise or the data H changes. Can be done.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, a predicted tape H is obtained from a tape speed signal and a separated synchronization signal that is approximately equal to the predicted tape H is detected as a horizontal synchronization signal, so that it is possible to avoid cases where there are many dropouts or Even during variable-speed playback that spans tracks, the horizontal synchronization signal can be detected stably with a fast response speed using a simple configuration, and its practical effects are significant.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a horizontal synchronizing signal detection circuit according to an embodiment of the present invention, Fig. 2 is an operation waveform diagram of each part of the horizontal synchronizing signal detection circuit in the same embodiment, and Fig. 3 is a horizontal synchronizing signal detection circuit in a conventional example. It is a block diagram of a circuit. 2... Synchronization signal separation circuit, 3... Pulse generation circuit, 5... Code conversion circuit, 6...
・ROM, 7... Counter, 8...
Gate signal generation circuit, 9...Horizontal synchronization signal gate circuit.

Claims (11)

[Claims] (1) In a rotating head helical scan type magnetic recording and reproducing device, means for synchronously separating the reproduced video signal, and means for predicting a predicted horizontal synchronizing signal cycle indicating the horizontal synchronizing signal cycle of the reproduced video signal from the tape speed signal; means for counting a pulse interval of the separated synchronizing signal by counting a reference clock signal; and obtaining a horizontal synchronizing signal from the separated synchronizing signal when the predicted horizontal synchronizing signal period and the pulse interval of the separated synchronizing signal are substantially equal. 1. A horizontal synchronization signal detection circuit comprising at least means. (2) The horizontal synchronization signal detection circuit according to claim 1, wherein the tape speed signal is generated from a capstan motor rotation speed control reference signal of a rotating head helical scan type magnetic recording and reproducing device. (3) The horizontal synchronizing signal detection circuit according to claim 1, wherein the tape speed signal is generated from a capstan motor rotation speed detection signal of a rotating head helical scan type magnetic recording and reproducing device. (4) The horizontal synchronization signal detection circuit according to claim 1, wherein the tape speed signal is generated from a roller rotation speed control reference signal of a rotating head helical scan type magnetic recording and reproducing device. (5) The horizontal synchronization signal detection circuit according to claim 1, wherein the tape speed signal is generated from a roller rotation speed detection signal of a rotating head helical scan type magnetic recording and reproducing device. (6) The horizontal synchronization signal detection circuit according to claim 1, wherein the tape speed signal is generated from a reproduction control signal reproduced from a control track of a rotating head helical scan type magnetic recording and reproduction device. (7) A patent claim characterized in that the number of pulses of a capstan motor rotational speed control reference signal is counted for a predetermined period of time, a read-only memory is addressed with this counted value, and a predicted horizontal synchronization signal period is predicted from a tape speed signal. 2. The horizontal periodic signal detection circuit according to item 2. (8) A patent claim characterized in that the number of pulses of the capstan motor rotational speed control detection signal is counted for a predetermined period of time, a read-only memory is addressed with this counted value, and a predicted horizontal synchronization signal period is predicted from the tape speed signal. The horizontal periodic signal detection circuit according to item 3. (9) The number of pulses of the roller rotational speed control reference signal is counted for a predetermined period of time, and a read-only memory is addressed with this counted value to predict a predicted horizontal synchronization signal period from the tape speed signal. 4. The horizontal periodic signal detection circuit according to item 4. (10) The number of pulses of the roller rotational speed detection signal is counted for a predetermined period of time, and a read-only memory is addressed with this counted value to predict a predicted horizontal synchronization signal period from the tape speed signal. 6. The horizontal periodic signal detection circuit according to item 6. (11) The period of the reproduction control signal is detected by counting a predetermined clock signal, and the read-only memory is addressed with this counted value to predict the expected horizontal synchronization signal period from the tape speed signal. Horizontal synchronization signal detection circuit according to range 6.